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drm/amd/display: Reduce number of arguments of dml32_CalculatePrefetchSchedule()
Several of the arguments are identical between the two call sites and they can be accessed through the 'struct vba_vars_st' pointer. This reduces the total amount of stack space that dml32_ModeSupportAndSystemConfigurationFull() uses by 208 bytes with LLVM 16 (1936 -> 1728), helping clear up the following clang warning: drivers/gpu/drm/amd/amdgpu/../display/dc/dml/dcn32/display_mode_vba_32.c:1721:6: error: stack frame size (2152) exceeds limit (2048) in 'dml32_ModeSupportAndSystemConfigurationFull' [-Werror,-Wframe-larger-than] void dml32_ModeSupportAndSystemConfigurationFull(struct display_mode_lib *mode_lib) ^ 1 error generated. Additionally, while modifying the arguments to dml32_CalculatePrefetchSchedule(), use 'v' consistently, instead of 'v' mixed with 'mode_lib->vba'. Link: ClangBuiltLinux#1681 Reported-by: "Sudip Mukherjee (Codethink)" <sudipm.mukherjee@gmail.com> Tested-by: Maíra Canal <mairacanal@riseup.net> Reviewed-by: Rodrigo Siqueira <Rodrigo.Siqueira@amd.com> Signed-off-by: Nathan Chancellor <nathan@kernel.org> Signed-off-by: Rodrigo Siqueira <Rodrigo.Siqueira@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
1 parent c4be0ac commit a3fef74

3 files changed

Lines changed: 78 additions & 133 deletions

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‎drivers/gpu/drm/amd/display/dc/dml/dcn32/display_mode_vba_32.c‎

Lines changed: 45 additions & 73 deletions
Original file line numberDiff line numberDiff line change
@@ -755,30 +755,18 @@ static void DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerforman
755755
v->dummy_vars.DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation.myPipe.BytePerPixelY = v->BytePerPixelY[k];
756756
v->dummy_vars.DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation.myPipe.BytePerPixelC = v->BytePerPixelC[k];
757757
v->dummy_vars.DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation.myPipe.ProgressiveToInterlaceUnitInOPP = mode_lib->vba.ProgressiveToInterlaceUnitInOPP;
758-
v->ErrorResult[k] = dml32_CalculatePrefetchSchedule(v->dummy_vars.DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation.HostVMInefficiencyFactor,
759-
&v->dummy_vars.DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation.myPipe, v->DSCDelay[k],
760-
mode_lib->vba.DPPCLKDelaySubtotal + mode_lib->vba.DPPCLKDelayCNVCFormater,
761-
mode_lib->vba.DPPCLKDelaySCL,
762-
mode_lib->vba.DPPCLKDelaySCLLBOnly,
763-
mode_lib->vba.DPPCLKDelayCNVCCursor,
764-
mode_lib->vba.DISPCLKDelaySubtotal,
765-
(unsigned int) (v->SwathWidthY[k] / mode_lib->vba.HRatio[k]),
766-
mode_lib->vba.OutputFormat[k],
767-
mode_lib->vba.MaxInterDCNTileRepeaters,
758+
v->ErrorResult[k] = dml32_CalculatePrefetchSchedule(
759+
v,
760+
k,
761+
v->dummy_vars.DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation.HostVMInefficiencyFactor,
762+
&v->dummy_vars.DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation.myPipe,
763+
v->DSCDelay[k],
764+
(unsigned int) (v->SwathWidthY[k] / v->HRatio[k]),
768765
dml_min(v->VStartupLines, v->MaxVStartupLines[k]),
769766
v->MaxVStartupLines[k],
770-
mode_lib->vba.GPUVMMaxPageTableLevels,
771-
mode_lib->vba.GPUVMEnable,
772-
mode_lib->vba.HostVMEnable,
773-
mode_lib->vba.HostVMMaxNonCachedPageTableLevels,
774-
mode_lib->vba.HostVMMinPageSize,
775-
mode_lib->vba.DynamicMetadataEnable[k],
776-
mode_lib->vba.DynamicMetadataVMEnabled,
777-
mode_lib->vba.DynamicMetadataLinesBeforeActiveRequired[k],
778-
mode_lib->vba.DynamicMetadataTransmittedBytes[k],
779767
v->UrgentLatency,
780768
v->UrgentExtraLatency,
781-
mode_lib->vba.TCalc,
769+
v->TCalc,
782770
v->PDEAndMetaPTEBytesFrame[k],
783771
v->MetaRowByte[k],
784772
v->PixelPTEBytesPerRow[k],
@@ -792,8 +780,8 @@ static void DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerforman
792780
v->MaxNumSwathC[k],
793781
v->swath_width_luma_ub[k],
794782
v->swath_width_chroma_ub[k],
795-
mode_lib->vba.SwathHeightY[k],
796-
mode_lib->vba.SwathHeightC[k],
783+
v->SwathHeightY[k],
784+
v->SwathHeightC[k],
797785
TWait,
798786
/* Output */
799787
&v->DSTXAfterScaler[k],
@@ -3228,63 +3216,47 @@ void dml32_ModeSupportAndSystemConfigurationFull(struct display_mode_lib *mode_l
32283216

32293217
mode_lib->vba.NoTimeForPrefetch[i][j][k] =
32303218
dml32_CalculatePrefetchSchedule(
3219+
v,
3220+
k,
32313221
v->dummy_vars.dml32_ModeSupportAndSystemConfigurationFull.HostVMInefficiencyFactor,
32323222
&v->dummy_vars.dml32_ModeSupportAndSystemConfigurationFull.myPipe,
3233-
mode_lib->vba.DSCDelayPerState[i][k],
3234-
mode_lib->vba.DPPCLKDelaySubtotal +
3235-
mode_lib->vba.DPPCLKDelayCNVCFormater,
3236-
mode_lib->vba.DPPCLKDelaySCL,
3237-
mode_lib->vba.DPPCLKDelaySCLLBOnly,
3238-
mode_lib->vba.DPPCLKDelayCNVCCursor,
3239-
mode_lib->vba.DISPCLKDelaySubtotal,
3240-
mode_lib->vba.SwathWidthYThisState[k] /
3241-
mode_lib->vba.HRatio[k],
3242-
mode_lib->vba.OutputFormat[k],
3243-
mode_lib->vba.MaxInterDCNTileRepeaters,
3244-
dml_min(mode_lib->vba.MaxVStartup,
3245-
mode_lib->vba.MaximumVStartup[i][j][k]),
3246-
mode_lib->vba.MaximumVStartup[i][j][k],
3247-
mode_lib->vba.GPUVMMaxPageTableLevels,
3248-
mode_lib->vba.GPUVMEnable, mode_lib->vba.HostVMEnable,
3249-
mode_lib->vba.HostVMMaxNonCachedPageTableLevels,
3250-
mode_lib->vba.HostVMMinPageSize,
3251-
mode_lib->vba.DynamicMetadataEnable[k],
3252-
mode_lib->vba.DynamicMetadataVMEnabled,
3253-
mode_lib->vba.DynamicMetadataLinesBeforeActiveRequired[k],
3254-
mode_lib->vba.DynamicMetadataTransmittedBytes[k],
3255-
mode_lib->vba.UrgLatency[i],
3256-
mode_lib->vba.ExtraLatency,
3257-
mode_lib->vba.TimeCalc,
3258-
mode_lib->vba.PDEAndMetaPTEBytesPerFrame[i][j][k],
3259-
mode_lib->vba.MetaRowBytes[i][j][k],
3260-
mode_lib->vba.DPTEBytesPerRow[i][j][k],
3261-
mode_lib->vba.PrefetchLinesY[i][j][k],
3262-
mode_lib->vba.SwathWidthYThisState[k],
3263-
mode_lib->vba.PrefillY[k],
3264-
mode_lib->vba.MaxNumSwY[k],
3265-
mode_lib->vba.PrefetchLinesC[i][j][k],
3266-
mode_lib->vba.SwathWidthCThisState[k],
3267-
mode_lib->vba.PrefillC[k],
3268-
mode_lib->vba.MaxNumSwC[k],
3269-
mode_lib->vba.swath_width_luma_ub_this_state[k],
3270-
mode_lib->vba.swath_width_chroma_ub_this_state[k],
3271-
mode_lib->vba.SwathHeightYThisState[k],
3272-
mode_lib->vba.SwathHeightCThisState[k], mode_lib->vba.TWait,
3223+
v->DSCDelayPerState[i][k],
3224+
v->SwathWidthYThisState[k] / v->HRatio[k],
3225+
dml_min(v->MaxVStartup, v->MaximumVStartup[i][j][k]),
3226+
v->MaximumVStartup[i][j][k],
3227+
v->UrgLatency[i],
3228+
v->ExtraLatency,
3229+
v->TimeCalc,
3230+
v->PDEAndMetaPTEBytesPerFrame[i][j][k],
3231+
v->MetaRowBytes[i][j][k],
3232+
v->DPTEBytesPerRow[i][j][k],
3233+
v->PrefetchLinesY[i][j][k],
3234+
v->SwathWidthYThisState[k],
3235+
v->PrefillY[k],
3236+
v->MaxNumSwY[k],
3237+
v->PrefetchLinesC[i][j][k],
3238+
v->SwathWidthCThisState[k],
3239+
v->PrefillC[k],
3240+
v->MaxNumSwC[k],
3241+
v->swath_width_luma_ub_this_state[k],
3242+
v->swath_width_chroma_ub_this_state[k],
3243+
v->SwathHeightYThisState[k],
3244+
v->SwathHeightCThisState[k], v->TWait,
32733245

32743246
/* Output */
32753247
&v->dummy_vars.dml32_ModeSupportAndSystemConfigurationFull.DSTXAfterScaler[k],
32763248
&v->dummy_vars.dml32_ModeSupportAndSystemConfigurationFull.DSTYAfterScaler[k],
3277-
&mode_lib->vba.LineTimesForPrefetch[k],
3278-
&mode_lib->vba.PrefetchBW[k],
3279-
&mode_lib->vba.LinesForMetaPTE[k],
3280-
&mode_lib->vba.LinesForMetaAndDPTERow[k],
3281-
&mode_lib->vba.VRatioPreY[i][j][k],
3282-
&mode_lib->vba.VRatioPreC[i][j][k],
3283-
&mode_lib->vba.RequiredPrefetchPixelDataBWLuma[0][0][k],
3284-
&mode_lib->vba.RequiredPrefetchPixelDataBWChroma[0][0][k],
3285-
&mode_lib->vba.NoTimeForDynamicMetadata[i][j][k],
3286-
&mode_lib->vba.Tno_bw[k],
3287-
&mode_lib->vba.prefetch_vmrow_bw[k],
3249+
&v->LineTimesForPrefetch[k],
3250+
&v->PrefetchBW[k],
3251+
&v->LinesForMetaPTE[k],
3252+
&v->LinesForMetaAndDPTERow[k],
3253+
&v->VRatioPreY[i][j][k],
3254+
&v->VRatioPreC[i][j][k],
3255+
&v->RequiredPrefetchPixelDataBWLuma[0][0][k],
3256+
&v->RequiredPrefetchPixelDataBWChroma[0][0][k],
3257+
&v->NoTimeForDynamicMetadata[i][j][k],
3258+
&v->Tno_bw[k],
3259+
&v->prefetch_vmrow_bw[k],
32883260
&v->dummy_vars.dml32_ModeSupportAndSystemConfigurationFull.dummy_single[0], // double *Tdmdl_vm
32893261
&v->dummy_vars.dml32_ModeSupportAndSystemConfigurationFull.dummy_single[1], // double *Tdmdl
32903262
&v->dummy_vars.dml32_ModeSupportAndSystemConfigurationFull.dummy_single[2], // double *TSetup

‎drivers/gpu/drm/amd/display/dc/dml/dcn32/display_mode_vba_util_32.c‎

Lines changed: 31 additions & 44 deletions
Original file line numberDiff line numberDiff line change
@@ -3363,28 +3363,14 @@ double dml32_CalculateExtraLatency(
33633363
} // CalculateExtraLatency
33643364

33653365
bool dml32_CalculatePrefetchSchedule(
3366+
struct vba_vars_st *v,
3367+
unsigned int k,
33663368
double HostVMInefficiencyFactor,
33673369
DmlPipe *myPipe,
33683370
unsigned int DSCDelay,
3369-
double DPPCLKDelaySubtotalPlusCNVCFormater,
3370-
double DPPCLKDelaySCL,
3371-
double DPPCLKDelaySCLLBOnly,
3372-
double DPPCLKDelayCNVCCursor,
3373-
double DISPCLKDelaySubtotal,
33743371
unsigned int DPP_RECOUT_WIDTH,
3375-
enum output_format_class OutputFormat,
3376-
unsigned int MaxInterDCNTileRepeaters,
33773372
unsigned int VStartup,
33783373
unsigned int MaxVStartup,
3379-
unsigned int GPUVMPageTableLevels,
3380-
bool GPUVMEnable,
3381-
bool HostVMEnable,
3382-
unsigned int HostVMMaxNonCachedPageTableLevels,
3383-
double HostVMMinPageSize,
3384-
bool DynamicMetadataEnable,
3385-
bool DynamicMetadataVMEnabled,
3386-
int DynamicMetadataLinesBeforeActiveRequired,
3387-
unsigned int DynamicMetadataTransmittedBytes,
33883374
double UrgentLatency,
33893375
double UrgentExtraLatency,
33903376
double TCalc,
@@ -3425,6 +3411,7 @@ bool dml32_CalculatePrefetchSchedule(
34253411
double *VUpdateWidthPix,
34263412
double *VReadyOffsetPix)
34273413
{
3414+
double DPPCLKDelaySubtotalPlusCNVCFormater = v->DPPCLKDelaySubtotal + v->DPPCLKDelayCNVCFormater;
34283415
bool MyError = false;
34293416
unsigned int DPPCycles, DISPCLKCycles;
34303417
double DSTTotalPixelsAfterScaler;
@@ -3461,27 +3448,27 @@ bool dml32_CalculatePrefetchSchedule(
34613448
double Tsw_est1 = 0;
34623449
double Tsw_est3 = 0;
34633450

3464-
if (GPUVMEnable == true && HostVMEnable == true)
3465-
HostVMDynamicLevelsTrips = HostVMMaxNonCachedPageTableLevels;
3451+
if (v->GPUVMEnable == true && v->HostVMEnable == true)
3452+
HostVMDynamicLevelsTrips = v->HostVMMaxNonCachedPageTableLevels;
34663453
else
34673454
HostVMDynamicLevelsTrips = 0;
34683455
#ifdef __DML_VBA_DEBUG__
3469-
dml_print("DML::%s: GPUVMEnable = %d\n", __func__, GPUVMEnable);
3470-
dml_print("DML::%s: GPUVMPageTableLevels = %d\n", __func__, GPUVMPageTableLevels);
3456+
dml_print("DML::%s: v->GPUVMEnable = %d\n", __func__, v->GPUVMEnable);
3457+
dml_print("DML::%s: v->GPUVMMaxPageTableLevels = %d\n", __func__, v->GPUVMMaxPageTableLevels);
34713458
dml_print("DML::%s: DCCEnable = %d\n", __func__, myPipe->DCCEnable);
3472-
dml_print("DML::%s: HostVMEnable=%d HostVMInefficiencyFactor=%f\n",
3473-
__func__, HostVMEnable, HostVMInefficiencyFactor);
3459+
dml_print("DML::%s: v->HostVMEnable=%d HostVMInefficiencyFactor=%f\n",
3460+
__func__, v->HostVMEnable, HostVMInefficiencyFactor);
34743461
#endif
34753462
dml32_CalculateVUpdateAndDynamicMetadataParameters(
3476-
MaxInterDCNTileRepeaters,
3463+
v->MaxInterDCNTileRepeaters,
34773464
myPipe->Dppclk,
34783465
myPipe->Dispclk,
34793466
myPipe->DCFClkDeepSleep,
34803467
myPipe->PixelClock,
34813468
myPipe->HTotal,
34823469
myPipe->VBlank,
3483-
DynamicMetadataTransmittedBytes,
3484-
DynamicMetadataLinesBeforeActiveRequired,
3470+
v->DynamicMetadataTransmittedBytes[k],
3471+
v->DynamicMetadataLinesBeforeActiveRequired[k],
34853472
myPipe->InterlaceEnable,
34863473
myPipe->ProgressiveToInterlaceUnitInOPP,
34873474
TSetup,
@@ -3496,19 +3483,19 @@ bool dml32_CalculatePrefetchSchedule(
34963483

34973484
LineTime = myPipe->HTotal / myPipe->PixelClock;
34983485
trip_to_mem = UrgentLatency;
3499-
Tvm_trips = UrgentExtraLatency + trip_to_mem * (GPUVMPageTableLevels * (HostVMDynamicLevelsTrips + 1) - 1);
3486+
Tvm_trips = UrgentExtraLatency + trip_to_mem * (v->GPUVMMaxPageTableLevels * (HostVMDynamicLevelsTrips + 1) - 1);
35003487

3501-
if (DynamicMetadataVMEnabled == true)
3488+
if (v->DynamicMetadataVMEnabled == true)
35023489
*Tdmdl = TWait + Tvm_trips + trip_to_mem;
35033490
else
35043491
*Tdmdl = TWait + UrgentExtraLatency;
35053492

35063493
#ifdef __DML_VBA_ALLOW_DELTA__
3507-
if (DynamicMetadataEnable == false)
3494+
if (v->DynamicMetadataEnable[k] == false)
35083495
*Tdmdl = 0.0;
35093496
#endif
35103497

3511-
if (DynamicMetadataEnable == true) {
3498+
if (v->DynamicMetadataEnable[k] == true) {
35123499
if (VStartup * LineTime < *TSetup + *Tdmdl + Tdmbf + Tdmec + Tdmsks) {
35133500
*NotEnoughTimeForDynamicMetadata = true;
35143501
#ifdef __DML_VBA_DEBUG__
@@ -3528,17 +3515,17 @@ bool dml32_CalculatePrefetchSchedule(
35283515
*NotEnoughTimeForDynamicMetadata = false;
35293516
}
35303517

3531-
*Tdmdl_vm = (DynamicMetadataEnable == true && DynamicMetadataVMEnabled == true &&
3532-
GPUVMEnable == true ? TWait + Tvm_trips : 0);
3518+
*Tdmdl_vm = (v->DynamicMetadataEnable[k] == true && v->DynamicMetadataVMEnabled == true &&
3519+
v->GPUVMEnable == true ? TWait + Tvm_trips : 0);
35333520

35343521
if (myPipe->ScalerEnabled)
3535-
DPPCycles = DPPCLKDelaySubtotalPlusCNVCFormater + DPPCLKDelaySCL;
3522+
DPPCycles = DPPCLKDelaySubtotalPlusCNVCFormater + v->DPPCLKDelaySCL;
35363523
else
3537-
DPPCycles = DPPCLKDelaySubtotalPlusCNVCFormater + DPPCLKDelaySCLLBOnly;
3524+
DPPCycles = DPPCLKDelaySubtotalPlusCNVCFormater + v->DPPCLKDelaySCLLBOnly;
35383525

3539-
DPPCycles = DPPCycles + myPipe->NumberOfCursors * DPPCLKDelayCNVCCursor;
3526+
DPPCycles = DPPCycles + myPipe->NumberOfCursors * v->DPPCLKDelayCNVCCursor;
35403527

3541-
DISPCLKCycles = DISPCLKDelaySubtotal;
3528+
DISPCLKCycles = v->DISPCLKDelaySubtotal;
35423529

35433530
if (myPipe->Dppclk == 0.0 || myPipe->Dispclk == 0.0)
35443531
return true;
@@ -3564,7 +3551,7 @@ bool dml32_CalculatePrefetchSchedule(
35643551
dml_print("DML::%s: DSTXAfterScaler: %d\n", __func__, *DSTXAfterScaler);
35653552
#endif
35663553

3567-
if (OutputFormat == dm_420 || (myPipe->InterlaceEnable && myPipe->ProgressiveToInterlaceUnitInOPP))
3554+
if (v->OutputFormat[k] == dm_420 || (myPipe->InterlaceEnable && myPipe->ProgressiveToInterlaceUnitInOPP))
35683555
*DSTYAfterScaler = 1;
35693556
else
35703557
*DSTYAfterScaler = 0;
@@ -3581,13 +3568,13 @@ bool dml32_CalculatePrefetchSchedule(
35813568

35823569
Tr0_trips = trip_to_mem * (HostVMDynamicLevelsTrips + 1);
35833570

3584-
if (GPUVMEnable == true) {
3571+
if (v->GPUVMEnable == true) {
35853572
Tvm_trips_rounded = dml_ceil(4.0 * Tvm_trips / LineTime, 1.0) / 4.0 * LineTime;
35863573
Tr0_trips_rounded = dml_ceil(4.0 * Tr0_trips / LineTime, 1.0) / 4.0 * LineTime;
3587-
if (GPUVMPageTableLevels >= 3) {
3574+
if (v->GPUVMMaxPageTableLevels >= 3) {
35883575
*Tno_bw = UrgentExtraLatency + trip_to_mem *
3589-
(double) ((GPUVMPageTableLevels - 2) * (HostVMDynamicLevelsTrips + 1) - 1);
3590-
} else if (GPUVMPageTableLevels == 1 && myPipe->DCCEnable != true) {
3576+
(double) ((v->GPUVMMaxPageTableLevels - 2) * (HostVMDynamicLevelsTrips + 1) - 1);
3577+
} else if (v->GPUVMMaxPageTableLevels == 1 && myPipe->DCCEnable != true) {
35913578
Tr0_trips_rounded = dml_ceil(4.0 * UrgentExtraLatency / LineTime, 1.0) /
35923579
4.0 * LineTime; // VBA_ERROR
35933580
*Tno_bw = UrgentExtraLatency;
@@ -3622,15 +3609,15 @@ bool dml32_CalculatePrefetchSchedule(
36223609
min_Lsw = dml_max(min_Lsw, 1.0);
36233610
Lsw_oto = dml_ceil(4.0 * dml_max(prefetch_sw_bytes / prefetch_bw_oto / LineTime, min_Lsw), 1.0) / 4.0;
36243611

3625-
if (GPUVMEnable == true) {
3612+
if (v->GPUVMEnable == true) {
36263613
Tvm_oto = dml_max3(
36273614
Tvm_trips,
36283615
*Tno_bw + PDEAndMetaPTEBytesFrame * HostVMInefficiencyFactor / prefetch_bw_oto,
36293616
LineTime / 4.0);
36303617
} else
36313618
Tvm_oto = LineTime / 4.0;
36323619

3633-
if ((GPUVMEnable == true || myPipe->DCCEnable == true)) {
3620+
if ((v->GPUVMEnable == true || myPipe->DCCEnable == true)) {
36343621
Tr0_oto = dml_max4(
36353622
Tr0_trips,
36363623
(MetaRowByte + PixelPTEBytesPerRow * HostVMInefficiencyFactor) / prefetch_bw_oto,
@@ -3833,15 +3820,15 @@ bool dml32_CalculatePrefetchSchedule(
38333820
#endif
38343821

38353822
if (prefetch_bw_equ > 0) {
3836-
if (GPUVMEnable == true) {
3823+
if (v->GPUVMEnable == true) {
38373824
Tvm_equ = dml_max3(*Tno_bw + PDEAndMetaPTEBytesFrame *
38383825
HostVMInefficiencyFactor / prefetch_bw_equ,
38393826
Tvm_trips, LineTime / 4);
38403827
} else {
38413828
Tvm_equ = LineTime / 4;
38423829
}
38433830

3844-
if ((GPUVMEnable == true || myPipe->DCCEnable == true)) {
3831+
if ((v->GPUVMEnable == true || myPipe->DCCEnable == true)) {
38453832
Tr0_equ = dml_max4((MetaRowByte + PixelPTEBytesPerRow *
38463833
HostVMInefficiencyFactor) / prefetch_bw_equ, Tr0_trips,
38473834
(LineTime - Tvm_equ) / 2, LineTime / 4);

‎drivers/gpu/drm/amd/display/dc/dml/dcn32/display_mode_vba_util_32.h‎

Lines changed: 2 additions & 16 deletions
Original file line numberDiff line numberDiff line change
@@ -713,28 +713,14 @@ double dml32_CalculateExtraLatency(
713713
unsigned int HostVMMaxNonCachedPageTableLevels);
714714

715715
bool dml32_CalculatePrefetchSchedule(
716+
struct vba_vars_st *v,
717+
unsigned int k,
716718
double HostVMInefficiencyFactor,
717719
DmlPipe *myPipe,
718720
unsigned int DSCDelay,
719-
double DPPCLKDelaySubtotalPlusCNVCFormater,
720-
double DPPCLKDelaySCL,
721-
double DPPCLKDelaySCLLBOnly,
722-
double DPPCLKDelayCNVCCursor,
723-
double DISPCLKDelaySubtotal,
724721
unsigned int DPP_RECOUT_WIDTH,
725-
enum output_format_class OutputFormat,
726-
unsigned int MaxInterDCNTileRepeaters,
727722
unsigned int VStartup,
728723
unsigned int MaxVStartup,
729-
unsigned int GPUVMPageTableLevels,
730-
bool GPUVMEnable,
731-
bool HostVMEnable,
732-
unsigned int HostVMMaxNonCachedPageTableLevels,
733-
double HostVMMinPageSize,
734-
bool DynamicMetadataEnable,
735-
bool DynamicMetadataVMEnabled,
736-
int DynamicMetadataLinesBeforeActiveRequired,
737-
unsigned int DynamicMetadataTransmittedBytes,
738724
double UrgentLatency,
739725
double UrgentExtraLatency,
740726
double TCalc,

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