Skip to content

Commit a5bb146

Browse files
hvilleneuvedoogregkh
authored andcommitted
serial: sc16is7xx: move port/channel init to separate function
The sc16is7xx_probe() function is very long. To improve readability, move port/channel initialization to a separate function. No functional change intended. Signed-off-by: Hugo Villeneuve <hvilleneuve@dimonoff.com> Link: https://patch.msgid.link/20251027142957.1032073-9-hugo@hugovil.com Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
1 parent 983f91e commit a5bb146

1 file changed

Lines changed: 70 additions & 57 deletions

File tree

drivers/tty/serial/sc16is7xx.c

Lines changed: 70 additions & 57 deletions
Original file line numberDiff line numberDiff line change
@@ -1499,6 +1499,75 @@ static int sc16is7xx_reset(struct device *dev, struct regmap *regmap)
14991499
return 0;
15001500
}
15011501

1502+
static int sc16is7xx_setup_channel(struct sc16is7xx_one *one, int i,
1503+
bool *port_registered)
1504+
{
1505+
struct uart_port *port = &one->port;
1506+
int ret;
1507+
1508+
ret = ida_alloc_max(&sc16is7xx_lines, SC16IS7XX_MAX_DEVS - 1, GFP_KERNEL);
1509+
if (ret < 0)
1510+
return ret;
1511+
1512+
port->line = ret;
1513+
1514+
/* Initialize port data */
1515+
port->type = PORT_SC16IS7XX;
1516+
port->fifosize = SC16IS7XX_FIFO_SIZE;
1517+
port->flags = UPF_FIXED_TYPE | UPF_LOW_LATENCY;
1518+
port->iobase = i;
1519+
/*
1520+
* Use all ones as membase to make sure uart_configure_port() in
1521+
* serial_core.c does not abort for SPI/I2C devices where the
1522+
* membase address is not applicable.
1523+
*/
1524+
port->membase = (void __iomem *)~0;
1525+
port->iotype = UPIO_PORT;
1526+
port->rs485_config = sc16is7xx_config_rs485;
1527+
port->rs485_supported = sc16is7xx_rs485_supported;
1528+
port->ops = &sc16is7xx_ops;
1529+
one->old_mctrl = 0;
1530+
1531+
mutex_init(&one->lock);
1532+
1533+
ret = uart_get_rs485_mode(port);
1534+
if (ret)
1535+
return ret;
1536+
1537+
/* Enable access to general register set */
1538+
sc16is7xx_port_write(port, SC16IS7XX_LCR_REG, 0x00);
1539+
1540+
/* Disable all interrupts */
1541+
sc16is7xx_port_write(port, SC16IS7XX_IER_REG, 0);
1542+
/* Disable TX/RX */
1543+
sc16is7xx_port_write(port, SC16IS7XX_EFCR_REG,
1544+
SC16IS7XX_EFCR_RXDISABLE_BIT |
1545+
SC16IS7XX_EFCR_TXDISABLE_BIT);
1546+
1547+
/* Initialize kthread work structs */
1548+
kthread_init_work(&one->tx_work, sc16is7xx_tx_proc);
1549+
kthread_init_work(&one->reg_work, sc16is7xx_reg_proc);
1550+
kthread_init_delayed_work(&one->ms_work, sc16is7xx_ms_proc);
1551+
1552+
/* Register port */
1553+
ret = uart_add_one_port(&sc16is7xx_uart, port);
1554+
if (ret)
1555+
return ret;
1556+
1557+
*port_registered = true;
1558+
1559+
sc16is7xx_regs_lock(port, SC16IS7XX_LCR_REG_SET_ENHANCED);
1560+
/* Enable write access to enhanced features */
1561+
sc16is7xx_port_write(port, SC16IS7XX_EFR_REG,
1562+
SC16IS7XX_EFR_ENABLE_BIT);
1563+
sc16is7xx_regs_unlock(port);
1564+
1565+
/* Go to suspend mode */
1566+
sc16is7xx_power(port, 0);
1567+
1568+
return 0;
1569+
}
1570+
15021571
int sc16is7xx_probe(struct device *dev, const struct sc16is7xx_devtype *devtype,
15031572
struct regmap *regmaps[], int irq)
15041573
{
@@ -1582,70 +1651,14 @@ int sc16is7xx_probe(struct device *dev, const struct sc16is7xx_devtype *devtype,
15821651
}
15831652

15841653
for (i = 0; i < devtype->nr_uart; ++i) {
1585-
ret = ida_alloc_max(&sc16is7xx_lines,
1586-
SC16IS7XX_MAX_DEVS - 1, GFP_KERNEL);
1587-
if (ret < 0)
1588-
goto out_ports;
1589-
1590-
s->p[i].port.line = ret;
1591-
1592-
/* Initialize port data */
15931654
s->p[i].port.dev = dev;
15941655
s->p[i].port.irq = irq;
1595-
s->p[i].port.type = PORT_SC16IS7XX;
1596-
s->p[i].port.fifosize = SC16IS7XX_FIFO_SIZE;
1597-
s->p[i].port.flags = UPF_FIXED_TYPE | UPF_LOW_LATENCY;
1598-
s->p[i].port.iobase = i;
1599-
/*
1600-
* Use all ones as membase to make sure uart_configure_port() in
1601-
* serial_core.c does not abort for SPI/I2C devices where the
1602-
* membase address is not applicable.
1603-
*/
1604-
s->p[i].port.membase = (void __iomem *)~0;
1605-
s->p[i].port.iotype = UPIO_PORT;
16061656
s->p[i].port.uartclk = freq;
1607-
s->p[i].port.rs485_config = sc16is7xx_config_rs485;
1608-
s->p[i].port.rs485_supported = sc16is7xx_rs485_supported;
1609-
s->p[i].port.ops = &sc16is7xx_ops;
1610-
s->p[i].old_mctrl = 0;
16111657
s->p[i].regmap = regmaps[i];
16121658

1613-
mutex_init(&s->p[i].lock);
1614-
1615-
ret = uart_get_rs485_mode(&s->p[i].port);
1616-
if (ret)
1617-
goto out_ports;
1618-
1619-
/* Enable access to general register set */
1620-
sc16is7xx_port_write(&s->p[i].port, SC16IS7XX_LCR_REG, 0x00);
1621-
1622-
/* Disable all interrupts */
1623-
sc16is7xx_port_write(&s->p[i].port, SC16IS7XX_IER_REG, 0);
1624-
/* Disable TX/RX */
1625-
sc16is7xx_port_write(&s->p[i].port, SC16IS7XX_EFCR_REG,
1626-
SC16IS7XX_EFCR_RXDISABLE_BIT |
1627-
SC16IS7XX_EFCR_TXDISABLE_BIT);
1628-
1629-
/* Initialize kthread work structs */
1630-
kthread_init_work(&s->p[i].tx_work, sc16is7xx_tx_proc);
1631-
kthread_init_work(&s->p[i].reg_work, sc16is7xx_reg_proc);
1632-
kthread_init_delayed_work(&s->p[i].ms_work, sc16is7xx_ms_proc);
1633-
1634-
/* Register port */
1635-
ret = uart_add_one_port(&sc16is7xx_uart, &s->p[i].port);
1659+
ret = sc16is7xx_setup_channel(&s->p[i], i, &port_registered[i]);
16361660
if (ret)
16371661
goto out_ports;
1638-
1639-
port_registered[i] = true;
1640-
1641-
sc16is7xx_regs_lock(&s->p[i].port, SC16IS7XX_LCR_REG_SET_ENHANCED);
1642-
/* Enable write access to enhanced features */
1643-
sc16is7xx_port_write(&s->p[i].port, SC16IS7XX_EFR_REG,
1644-
SC16IS7XX_EFR_ENABLE_BIT);
1645-
sc16is7xx_regs_unlock(&s->p[i].port);
1646-
1647-
/* Go to suspend mode */
1648-
sc16is7xx_power(&s->p[i].port, 0);
16491662
}
16501663

16511664
sc16is7xx_setup_irda_ports(s);

0 commit comments

Comments
 (0)