@@ -1605,6 +1605,49 @@ static void domain_flush_devices(struct protection_domain *domain)
16051605 device_flush_dte (dev_data );
16061606}
16071607
1608+ static void update_device_table (struct protection_domain * domain )
1609+ {
1610+ struct iommu_dev_data * dev_data ;
1611+
1612+ list_for_each_entry (dev_data , & domain -> dev_list , list ) {
1613+ struct amd_iommu * iommu = rlookup_amd_iommu (dev_data -> dev );
1614+
1615+ set_dte_entry (iommu , dev_data );
1616+ clone_aliases (iommu , dev_data -> dev );
1617+ }
1618+ }
1619+
1620+ void amd_iommu_update_and_flush_device_table (struct protection_domain * domain )
1621+ {
1622+ update_device_table (domain );
1623+ domain_flush_devices (domain );
1624+ }
1625+
1626+ void amd_iommu_domain_update (struct protection_domain * domain )
1627+ {
1628+ /* Update device table */
1629+ amd_iommu_update_and_flush_device_table (domain );
1630+
1631+ /* Flush domain TLB(s) and wait for completion */
1632+ amd_iommu_domain_flush_all (domain );
1633+ }
1634+
1635+ int amd_iommu_complete_ppr (struct pci_dev * pdev , u32 pasid ,
1636+ int status , int tag )
1637+ {
1638+ struct iommu_dev_data * dev_data ;
1639+ struct amd_iommu * iommu ;
1640+ struct iommu_cmd cmd ;
1641+
1642+ dev_data = dev_iommu_priv_get (& pdev -> dev );
1643+ iommu = get_amd_iommu_from_dev (& pdev -> dev );
1644+
1645+ build_complete_ppr (& cmd , dev_data -> devid , pasid , status ,
1646+ tag , dev_data -> pri_tlp );
1647+
1648+ return iommu_queue_command (iommu , & cmd );
1649+ }
1650+
16081651/****************************************************************************
16091652 *
16101653 * The next functions belong to the domain allocation. A domain is
@@ -2116,39 +2159,6 @@ static struct iommu_group *amd_iommu_device_group(struct device *dev)
21162159 return acpihid_device_group (dev );
21172160}
21182161
2119- /*****************************************************************************
2120- *
2121- * The next functions belong to the dma_ops mapping/unmapping code.
2122- *
2123- *****************************************************************************/
2124-
2125- static void update_device_table (struct protection_domain * domain )
2126- {
2127- struct iommu_dev_data * dev_data ;
2128-
2129- list_for_each_entry (dev_data , & domain -> dev_list , list ) {
2130- struct amd_iommu * iommu = get_amd_iommu_from_dev_data (dev_data );
2131-
2132- set_dte_entry (iommu , dev_data );
2133- clone_aliases (iommu , dev_data -> dev );
2134- }
2135- }
2136-
2137- void amd_iommu_update_and_flush_device_table (struct protection_domain * domain )
2138- {
2139- update_device_table (domain );
2140- domain_flush_devices (domain );
2141- }
2142-
2143- void amd_iommu_domain_update (struct protection_domain * domain )
2144- {
2145- /* Update device table */
2146- amd_iommu_update_and_flush_device_table (domain );
2147-
2148- /* Flush domain TLB(s) and wait for completion */
2149- amd_iommu_domain_flush_all (domain );
2150- }
2151-
21522162/*****************************************************************************
21532163 *
21542164 * The following functions belong to the exported interface of AMD IOMMU
@@ -2747,22 +2757,6 @@ const struct iommu_ops amd_iommu_ops = {
27472757 }
27482758};
27492759
2750- int amd_iommu_complete_ppr (struct pci_dev * pdev , u32 pasid ,
2751- int status , int tag )
2752- {
2753- struct iommu_dev_data * dev_data ;
2754- struct amd_iommu * iommu ;
2755- struct iommu_cmd cmd ;
2756-
2757- dev_data = dev_iommu_priv_get (& pdev -> dev );
2758- iommu = get_amd_iommu_from_dev (& pdev -> dev );
2759-
2760- build_complete_ppr (& cmd , dev_data -> devid , pasid , status ,
2761- tag , dev_data -> pri_tlp );
2762-
2763- return iommu_queue_command (iommu , & cmd );
2764- }
2765-
27662760#ifdef CONFIG_IRQ_REMAP
27672761
27682762/*****************************************************************************
0 commit comments