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Merge tag 'renesas-dts-for-v6.20-tag1' of git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-devel into soc/dt
Renesas DTS updates for v6.20 - Add USB3.2 host and more RSCI serial support for the RZ/G3E SoC and the RZ/G3E SMARC EVK board, - Add display and USB3.0 host support for the RZ/V2H and RZ/V2N SoCs and their EVK boards, - Add SPI NOR Flash support for the Yuridenki-Shokai Kakip board, - Add PCIe support for the RZ/G3S SoC and the RZ/G3S SMARC EVK board, - Add SPI, interrupt controller, and DMAC support for the RZ/T2H, RZ/N2H, and RZ/V2N SoCs, - Add NMI wakeup button support for the RZ/V2N EVK board, - Add thermal support for the RZ/V2N SoC, - Add system watchdog timer support for R-Car V3H, which is reserved for secure firmware, - Add window watchdog timer support for R-Car V3M, V3H, and Gen4 SoCs, - Miscellaneous fixes and improvements. * tag 'renesas-dts-for-v6.20-tag1' of git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-devel: (41 commits) arm64: dts: renesas: r8a779h0: Add WWDT nodes arm64: dts: renesas: r8a779g0: Add WWDT nodes arm64: dts: renesas: r8a779f0: Add WWDT nodes arm64: dts: renesas: r8a779a0: Add WWDT nodes arm64: dts: renesas: r8a77980: Add WWDT nodes arm64: dts: renesas: r8a77970: Add WWDT nodes arm64: dts: renesas: condor/v3hsk: Mark SWDT as reserved arm64: dts: renesas: r8a77980: Add SWDT node arm64: dts: renesas: r9a09g056: Add TSU nodes arm64: dts: renesas: r9a09g087: Add DMAC support arm64: dts: renesas: r9a09g077: Add DMAC support arm64: dts: renesas: r9a09g087: Add ICU support arm64: dts: renesas: r9a09g077: Add ICU support arm64: dts: renesas: r9a09g047e57-smarc: Enable rsci{2,4,9} nodes arm64: dts: renesas: renesas-smarc2: Move aliases to board DTS arm64: dts: renesas: r9a09g047: Add RSCI nodes ARM: dts: renesas: r9a06g032: Add Ethernet switch interrupts arm64: dts: renesas: r9a09g056n48-rzv2n-evk: Add NMI wakeup button support arm64: dts: renesas: r9a09g056: Add RSPI nodes arm64: dts: renesas: r9a09g056: Add DMAC nodes ... Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2 parents bc6fe9f + aca3bbd commit aa5f91c

25 files changed

Lines changed: 2481 additions & 7 deletions

‎arch/arm/boot/dts/renesas/r9a06g032.dtsi‎

Lines changed: 6 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -453,6 +453,12 @@
453453
<&sysctrl R9A06G032_CLK_SWITCH>;
454454
clock-names = "hclk", "clk";
455455
power-domains = <&sysctrl>;
456+
interrupts = <GIC_SPI 40 IRQ_TYPE_LEVEL_HIGH>,
457+
<GIC_SPI 42 IRQ_TYPE_LEVEL_HIGH>,
458+
<GIC_SPI 43 IRQ_TYPE_LEVEL_HIGH>,
459+
<GIC_SPI 44 IRQ_TYPE_LEVEL_HIGH>,
460+
<GIC_SPI 45 IRQ_TYPE_LEVEL_HIGH>;
461+
interrupt-names = "dlr", "switch", "prp", "hub", "ptrn";
456462
status = "disabled";
457463

458464
ethernet-ports {

‎arch/arm64/boot/dts/renesas/condor-common.dtsi‎

Lines changed: 5 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -554,3 +554,8 @@
554554
&scif_clk {
555555
clock-frequency = <14745600>;
556556
};
557+
558+
/* Firmware should reserve it but sadly doesn't */
559+
&swdt {
560+
status = "reserved";
561+
};

‎arch/arm64/boot/dts/renesas/r8a77970.dtsi‎

Lines changed: 32 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -1209,6 +1209,38 @@
12091209
};
12101210
};
12111211

1212+
wwdt0: watchdog@ffc90000 {
1213+
compatible = "renesas,r8a77970-wwdt",
1214+
"renesas,rcar-gen3-wwdt";
1215+
reg = <0 0xffc90000 0 0x10>;
1216+
interrupts = <GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH>,
1217+
<GIC_SPI 345 IRQ_TYPE_LEVEL_HIGH>;
1218+
interrupt-names = "pretimeout", "error";
1219+
clocks = <&cpg CPG_CORE R8A77970_CLK_R>,
1220+
<&cpg CPG_CORE R8A77970_CLK_CP>;
1221+
clock-names = "cnt", "bus";
1222+
power-domains = <&sysc R8A77970_PD_ALWAYS_ON>;
1223+
resets = <&cpg 325>;
1224+
reset-names = "cnt";
1225+
status = "disabled";
1226+
};
1227+
1228+
wwdt1: watchdog@ffca0000 {
1229+
compatible = "renesas,r8a77970-wwdt",
1230+
"renesas,rcar-gen3-wwdt";
1231+
reg = <0 0xffca0000 0 0x10>;
1232+
interrupts = <GIC_SPI 270 IRQ_TYPE_LEVEL_HIGH>,
1233+
<GIC_SPI 346 IRQ_TYPE_LEVEL_HIGH>;
1234+
interrupt-names = "pretimeout", "error";
1235+
clocks = <&cpg CPG_CORE R8A77970_CLK_R>,
1236+
<&cpg CPG_CORE R8A77970_CLK_CP>;
1237+
clock-names = "cnt", "bus";
1238+
power-domains = <&sysc R8A77970_PD_ALWAYS_ON>;
1239+
resets = <&cpg 324>;
1240+
reset-names = "cnt";
1241+
status = "disabled";
1242+
};
1243+
12121244
prr: chipid@fff00044 {
12131245
compatible = "renesas,prr";
12141246
reg = <0 0xfff00044 0 4>;

‎arch/arm64/boot/dts/renesas/r8a77980-v3hsk.dts‎

Lines changed: 5 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -289,3 +289,8 @@
289289
&scif_clk {
290290
clock-frequency = <14745600>;
291291
};
292+
293+
/* Firmware should reserve it but sadly doesn't */
294+
&swdt {
295+
status = "reserved";
296+
};

‎arch/arm64/boot/dts/renesas/r8a77980.dtsi‎

Lines changed: 89 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -139,6 +139,15 @@
139139
status = "disabled";
140140
};
141141

142+
swdt: watchdog@e6030000 {
143+
compatible = "renesas,r8a77980-wdt", "renesas,rcar-gen3-wdt";
144+
reg = <0 0xe6030000 0 0x0c>;
145+
interrupts = <GIC_SPI 141 IRQ_TYPE_LEVEL_HIGH>;
146+
clocks = <&cpg CPG_CORE R8A77980_CLK_OSC>;
147+
power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;
148+
status = "disabled";
149+
};
150+
142151
gpio0: gpio@e6050000 {
143152
compatible = "renesas,gpio-r8a77980",
144153
"renesas,rcar-gen3-gpio";
@@ -1582,6 +1591,86 @@
15821591
};
15831592
};
15841593

1594+
wwdt0: watchdog@ffc90000 {
1595+
compatible = "renesas,r8a77980-wwdt",
1596+
"renesas,rcar-gen3-wwdt";
1597+
reg = <0 0xffc90000 0 0x10>;
1598+
interrupts = <GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH>,
1599+
<GIC_SPI 345 IRQ_TYPE_LEVEL_HIGH>;
1600+
interrupt-names = "pretimeout", "error";
1601+
clocks = <&cpg CPG_CORE R8A77980_CLK_R>,
1602+
<&cpg CPG_CORE R8A77980_CLK_CP>;
1603+
clock-names = "cnt", "bus";
1604+
power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;
1605+
resets = <&cpg 325>;
1606+
reset-names = "cnt";
1607+
status = "disabled";
1608+
};
1609+
1610+
wwdt1: watchdog@ffca0000 {
1611+
compatible = "renesas,r8a77980-wwdt",
1612+
"renesas,rcar-gen3-wwdt";
1613+
reg = <0 0xffca0000 0 0x10>;
1614+
interrupts = <GIC_SPI 270 IRQ_TYPE_LEVEL_HIGH>,
1615+
<GIC_SPI 346 IRQ_TYPE_LEVEL_HIGH>;
1616+
interrupt-names = "pretimeout", "error";
1617+
clocks = <&cpg CPG_CORE R8A77980_CLK_R>,
1618+
<&cpg CPG_CORE R8A77980_CLK_CP>;
1619+
clock-names = "cnt", "bus";
1620+
power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;
1621+
resets = <&cpg 324>;
1622+
reset-names = "cnt";
1623+
status = "disabled";
1624+
};
1625+
1626+
wwdt2: watchdog@ffcb0000 {
1627+
compatible = "renesas,r8a77980-wwdt",
1628+
"renesas,rcar-gen3-wwdt";
1629+
reg = <0 0xffcb0000 0 0x10>;
1630+
interrupts = <GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>,
1631+
<GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH>;
1632+
interrupt-names = "pretimeout", "error";
1633+
clocks = <&cpg CPG_CORE R8A77980_CLK_R>,
1634+
<&cpg CPG_CORE R8A77980_CLK_CP>;
1635+
clock-names = "cnt", "bus";
1636+
power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;
1637+
resets = <&cpg 321>;
1638+
reset-names = "cnt";
1639+
status = "disabled";
1640+
};
1641+
1642+
wwdt3: watchdog@ffcc0000 {
1643+
compatible = "renesas,r8a77980-wwdt",
1644+
"renesas,rcar-gen3-wwdt";
1645+
reg = <0 0xffcc0000 0 0x10>;
1646+
interrupts = <GIC_SPI 12 IRQ_TYPE_LEVEL_HIGH>,
1647+
<GIC_SPI 13 IRQ_TYPE_LEVEL_HIGH>;
1648+
interrupt-names = "pretimeout", "error";
1649+
clocks = <&cpg CPG_CORE R8A77980_CLK_R>,
1650+
<&cpg CPG_CORE R8A77980_CLK_CP>;
1651+
clock-names = "cnt", "bus";
1652+
power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;
1653+
resets = <&cpg 309>;
1654+
reset-names = "cnt";
1655+
status = "disabled";
1656+
};
1657+
1658+
wwdt4: watchdog@ffcf0000 {
1659+
compatible = "renesas,r8a77980-wwdt",
1660+
"renesas,rcar-gen3-wwdt";
1661+
reg = <0 0xffcf0000 0 0x10>;
1662+
interrupts = <GIC_SPI 17 IRQ_TYPE_LEVEL_HIGH>,
1663+
<GIC_SPI 65 IRQ_TYPE_LEVEL_HIGH>;
1664+
interrupt-names = "pretimeout", "error";
1665+
clocks = <&cpg CPG_CORE R8A77980_CLK_R>,
1666+
<&cpg CPG_CORE R8A77980_CLK_CP>;
1667+
clock-names = "cnt", "bus";
1668+
power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;
1669+
resets = <&cpg 403>;
1670+
reset-names = "cnt";
1671+
status = "disabled";
1672+
};
1673+
15851674
prr: chipid@fff00044 {
15861675
compatible = "renesas,prr";
15871676
reg = <0 0xfff00044 0 4>;

‎arch/arm64/boot/dts/renesas/r8a779a0.dtsi‎

Lines changed: 160 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -3032,6 +3032,166 @@
30323032
};
30333033
};
30343034

3035+
wwdt0: watchdog@ffc90000 {
3036+
compatible = "renesas,r8a779a0-wwdt",
3037+
"renesas,rcar-gen4-wwdt";
3038+
reg = <0 0xffc90000 0 0x10>;
3039+
interrupts = <GIC_SPI 480 IRQ_TYPE_LEVEL_HIGH>,
3040+
<GIC_SPI 481 IRQ_TYPE_LEVEL_HIGH>;
3041+
interrupt-names = "pretimeout", "error";
3042+
clocks = <&cpg CPG_CORE R8A779A0_CLK_R>,
3043+
<&cpg CPG_CORE R8A779A0_CLK_CP>;
3044+
clock-names = "cnt", "bus";
3045+
power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>;
3046+
resets = <&cpg 1200>, <&cpg 1318>;
3047+
reset-names = "cnt", "bus";
3048+
status = "disabled";
3049+
};
3050+
3051+
wwdt1: watchdog@ffca0000 {
3052+
compatible = "renesas,r8a779a0-wwdt",
3053+
"renesas,rcar-gen4-wwdt";
3054+
reg = <0 0xffca0000 0 0x10>;
3055+
interrupts = <GIC_SPI 482 IRQ_TYPE_LEVEL_HIGH>,
3056+
<GIC_SPI 483 IRQ_TYPE_LEVEL_HIGH>;
3057+
interrupt-names = "pretimeout", "error";
3058+
clocks = <&cpg CPG_CORE R8A779A0_CLK_R>,
3059+
<&cpg CPG_CORE R8A779A0_CLK_CP>;
3060+
clock-names = "cnt", "bus";
3061+
power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>;
3062+
resets = <&cpg 1201>, <&cpg 1319>;
3063+
reset-names = "cnt", "bus";
3064+
status = "disabled";
3065+
};
3066+
3067+
wwdt2: watchdog@ffcb0000 {
3068+
compatible = "renesas,r8a779a0-wwdt",
3069+
"renesas,rcar-gen4-wwdt";
3070+
reg = <0 0xffcb0000 0 0x10>;
3071+
interrupts = <GIC_SPI 484 IRQ_TYPE_LEVEL_HIGH>,
3072+
<GIC_SPI 485 IRQ_TYPE_LEVEL_HIGH>;
3073+
interrupt-names = "pretimeout", "error";
3074+
clocks = <&cpg CPG_CORE R8A779A0_CLK_R>,
3075+
<&cpg CPG_CORE R8A779A0_CLK_CP>;
3076+
clock-names = "cnt", "bus";
3077+
power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>;
3078+
resets = <&cpg 1202>, <&cpg 1320>;
3079+
reset-names = "cnt", "bus";
3080+
status = "disabled";
3081+
};
3082+
3083+
wwdt3: watchdog@ffcc0000 {
3084+
compatible = "renesas,r8a779a0-wwdt",
3085+
"renesas,rcar-gen4-wwdt";
3086+
reg = <0 0xffcc0000 0 0x10>;
3087+
interrupts = <GIC_SPI 486 IRQ_TYPE_LEVEL_HIGH>,
3088+
<GIC_SPI 487 IRQ_TYPE_LEVEL_HIGH>;
3089+
interrupt-names = "pretimeout", "error";
3090+
clocks = <&cpg CPG_CORE R8A779A0_CLK_R>,
3091+
<&cpg CPG_CORE R8A779A0_CLK_CP>;
3092+
clock-names = "cnt", "bus";
3093+
power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>;
3094+
resets = <&cpg 1203>, <&cpg 1321>;
3095+
reset-names = "cnt", "bus";
3096+
status = "disabled";
3097+
};
3098+
3099+
wwdt4: watchdog@ffcf0000 {
3100+
compatible = "renesas,r8a779a0-wwdt",
3101+
"renesas,rcar-gen4-wwdt";
3102+
reg = <0 0xffcf0000 0 0x10>;
3103+
interrupts = <GIC_SPI 488 IRQ_TYPE_LEVEL_HIGH>,
3104+
<GIC_SPI 489 IRQ_TYPE_LEVEL_HIGH>;
3105+
interrupt-names = "pretimeout", "error";
3106+
clocks = <&cpg CPG_CORE R8A779A0_CLK_R>,
3107+
<&cpg CPG_CORE R8A779A0_CLK_CP>;
3108+
clock-names = "cnt", "bus";
3109+
power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>;
3110+
resets = <&cpg 1204>, <&cpg 1322>;
3111+
reset-names = "cnt", "bus";
3112+
status = "disabled";
3113+
};
3114+
3115+
wwdt5: watchdog@ffef0000 {
3116+
compatible = "renesas,r8a779a0-wwdt",
3117+
"renesas,rcar-gen4-wwdt";
3118+
reg = <0 0xffef0000 0 0x10>;
3119+
interrupts = <GIC_SPI 490 IRQ_TYPE_LEVEL_HIGH>,
3120+
<GIC_SPI 491 IRQ_TYPE_LEVEL_HIGH>;
3121+
interrupt-names = "pretimeout", "error";
3122+
clocks = <&cpg CPG_CORE R8A779A0_CLK_R>,
3123+
<&cpg CPG_CORE R8A779A0_CLK_CP>;
3124+
clock-names = "cnt", "bus";
3125+
power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>;
3126+
resets = <&cpg 1205>, <&cpg 1323>;
3127+
reset-names = "cnt", "bus";
3128+
status = "disabled";
3129+
};
3130+
3131+
wwdt6: watchdog@fff10000 {
3132+
compatible = "renesas,r8a779a0-wwdt",
3133+
"renesas,rcar-gen4-wwdt";
3134+
reg = <0 0xfff10000 0 0x10>;
3135+
interrupts = <GIC_SPI 492 IRQ_TYPE_LEVEL_HIGH>,
3136+
<GIC_SPI 493 IRQ_TYPE_LEVEL_HIGH>;
3137+
interrupt-names = "pretimeout", "error";
3138+
clocks = <&cpg CPG_CORE R8A779A0_CLK_R>,
3139+
<&cpg CPG_CORE R8A779A0_CLK_CP>;
3140+
clock-names = "cnt", "bus";
3141+
power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>;
3142+
resets = <&cpg 1206>, <&cpg 1324>;
3143+
reset-names = "cnt", "bus";
3144+
status = "disabled";
3145+
};
3146+
3147+
wwdt7: watchdog@fff20000 {
3148+
compatible = "renesas,r8a779a0-wwdt",
3149+
"renesas,rcar-gen4-wwdt";
3150+
reg = <0 0xfff20000 0 0x10>;
3151+
interrupts = <GIC_SPI 494 IRQ_TYPE_LEVEL_HIGH>,
3152+
<GIC_SPI 495 IRQ_TYPE_LEVEL_HIGH>;
3153+
interrupt-names = "pretimeout", "error";
3154+
clocks = <&cpg CPG_CORE R8A779A0_CLK_R>,
3155+
<&cpg CPG_CORE R8A779A0_CLK_CP>;
3156+
clock-names = "cnt", "bus";
3157+
power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>;
3158+
resets = <&cpg 1207>, <&cpg 1325>;
3159+
reset-names = "cnt", "bus";
3160+
status = "disabled";
3161+
};
3162+
3163+
wwdt8: watchdog@fff30000 {
3164+
compatible = "renesas,r8a779a0-wwdt",
3165+
"renesas,rcar-gen4-wwdt";
3166+
reg = <0 0xfff30000 0 0x10>;
3167+
interrupts = <GIC_SPI 496 IRQ_TYPE_LEVEL_HIGH>,
3168+
<GIC_SPI 497 IRQ_TYPE_LEVEL_HIGH>;
3169+
interrupt-names = "pretimeout", "error";
3170+
clocks = <&cpg CPG_CORE R8A779A0_CLK_R>,
3171+
<&cpg CPG_CORE R8A779A0_CLK_CP>;
3172+
clock-names = "cnt", "bus";
3173+
power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>;
3174+
resets = <&cpg 1208>, <&cpg 1326>;
3175+
reset-names = "cnt", "bus";
3176+
status = "disabled";
3177+
};
3178+
3179+
wwdt9: watchdog@fff40000 {
3180+
compatible = "renesas,r8a779a0-wwdt",
3181+
"renesas,rcar-gen4-wwdt";
3182+
reg = <0 0xfff40000 0 0x10>;
3183+
interrupts = <GIC_SPI 498 IRQ_TYPE_LEVEL_HIGH>,
3184+
<GIC_SPI 499 IRQ_TYPE_LEVEL_HIGH>;
3185+
interrupt-names = "pretimeout", "error";
3186+
clocks = <&cpg CPG_CORE R8A779A0_CLK_R>,
3187+
<&cpg CPG_CORE R8A779A0_CLK_CP>;
3188+
clock-names = "cnt", "bus";
3189+
power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>;
3190+
resets = <&cpg 1209>, <&cpg 1327>;
3191+
reset-names = "cnt", "bus";
3192+
status = "disabled";
3193+
};
3194+
30353195
prr: chipid@fff00044 {
30363196
compatible = "renesas,prr";
30373197
reg = <0 0xfff00044 0 4>;

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