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drm/i915/pmu: Turn off the timer to sample frequencies when GT is parked
pmu_needs_timer() keeps the timer running even when GT is parked, ostensibly to sample requested/actual frequencies. However frequency_sample() has the following: /* Report 0/0 (actual/requested) frequency while parked. */ if (!intel_gt_pm_get_if_awake(gt)) return; The above code prevents frequencies to be sampled while the GT is parked. So we might as well turn off the sampling timer itself in this case and save CPU cycles/power. v2: Instead of turning freq bits off, return false, since no counters will run after this change when GT is parked (Tvrtko) v3: Remove gpu_active argument of pmu_needs_timer (Andrzej) Signed-off-by: Ashutosh Dixit <ashutosh.dixit@intel.com> Reviewed-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com> Reviewed-by: Andrzej Hajda <andrzej.hajda@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20230524215629.97920-2-ashutosh.dixit@intel.com
1 parent 09a3601 commit ab12902

1 file changed

Lines changed: 5 additions & 11 deletions

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drivers/gpu/drm/i915/i915_pmu.c

Lines changed: 5 additions & 11 deletions
Original file line numberDiff line numberDiff line change
@@ -139,7 +139,7 @@ static u32 frequency_enabled_mask(void)
139139
return mask;
140140
}
141141

142-
static bool pmu_needs_timer(struct i915_pmu *pmu, bool gpu_active)
142+
static bool pmu_needs_timer(struct i915_pmu *pmu)
143143
{
144144
struct drm_i915_private *i915 = container_of(pmu, typeof(*i915), pmu);
145145
u32 enable;
@@ -157,17 +157,11 @@ static bool pmu_needs_timer(struct i915_pmu *pmu, bool gpu_active)
157157
*/
158158
enable &= frequency_enabled_mask() | ENGINE_SAMPLE_MASK;
159159

160-
/*
161-
* When the GPU is idle per-engine counters do not need to be
162-
* running so clear those bits out.
163-
*/
164-
if (!gpu_active)
165-
enable &= ~ENGINE_SAMPLE_MASK;
166160
/*
167161
* Also there is software busyness tracking available we do not
168162
* need the timer for I915_SAMPLE_BUSY counter.
169163
*/
170-
else if (i915->caps.scheduler & I915_SCHEDULER_CAP_ENGINE_BUSY_STATS)
164+
if (i915->caps.scheduler & I915_SCHEDULER_CAP_ENGINE_BUSY_STATS)
171165
enable &= ~BIT(I915_SAMPLE_BUSY);
172166

173167
/*
@@ -295,7 +289,7 @@ static void park_rc6(struct intel_gt *gt)
295289

296290
static void __i915_pmu_maybe_start_timer(struct i915_pmu *pmu)
297291
{
298-
if (!pmu->timer_enabled && pmu_needs_timer(pmu, true)) {
292+
if (!pmu->timer_enabled && pmu_needs_timer(pmu)) {
299293
pmu->timer_enabled = true;
300294
pmu->timer_last = ktime_get();
301295
hrtimer_start_range_ns(&pmu->timer,
@@ -321,7 +315,7 @@ void i915_pmu_gt_parked(struct intel_gt *gt)
321315
*/
322316
pmu->unparked &= ~BIT(gt->info.id);
323317
if (pmu->unparked == 0)
324-
pmu->timer_enabled = pmu_needs_timer(pmu, false);
318+
pmu->timer_enabled = false;
325319

326320
spin_unlock_irq(&pmu->lock);
327321
}
@@ -827,7 +821,7 @@ static void i915_pmu_disable(struct perf_event *event)
827821
*/
828822
if (--pmu->enable_count[bit] == 0) {
829823
pmu->enable &= ~BIT(bit);
830-
pmu->timer_enabled &= pmu_needs_timer(pmu, true);
824+
pmu->timer_enabled &= pmu_needs_timer(pmu);
831825
}
832826

833827
spin_unlock_irqrestore(&pmu->lock, flags);

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