@@ -515,6 +515,32 @@ static const struct clk_rpmh_desc clk_rpmh_sm8350 = {
515515/* Resource name must match resource id present in cmd-db */
516516DEFINE_CLK_RPMH_ARC (sc7280 , bi_tcxo , bi_tcxo_ao , "xo.lvl" , 0x3 , 4 );
517517
518+ DEFINE_CLK_RPMH_VRM (sm8450 , ln_bb_clk1 , ln_bb_clk1_ao , "lnbclka1" , 4 );
519+ DEFINE_CLK_RPMH_VRM (sm8450 , ln_bb_clk2 , ln_bb_clk2_ao , "lnbclka2" , 4 );
520+
521+ static struct clk_hw * sm8450_rpmh_clocks [] = {
522+ [RPMH_CXO_CLK ] = & sc7280_bi_tcxo .hw ,
523+ [RPMH_CXO_CLK_A ] = & sc7280_bi_tcxo_ao .hw ,
524+ [RPMH_LN_BB_CLK1 ] = & sm8450_ln_bb_clk1 .hw ,
525+ [RPMH_LN_BB_CLK1_A ] = & sm8450_ln_bb_clk1_ao .hw ,
526+ [RPMH_LN_BB_CLK2 ] = & sm8450_ln_bb_clk2 .hw ,
527+ [RPMH_LN_BB_CLK2_A ] = & sm8450_ln_bb_clk2_ao .hw ,
528+ [RPMH_RF_CLK1 ] = & sdm845_rf_clk1 .hw ,
529+ [RPMH_RF_CLK1_A ] = & sdm845_rf_clk1_ao .hw ,
530+ [RPMH_RF_CLK2 ] = & sdm845_rf_clk2 .hw ,
531+ [RPMH_RF_CLK2_A ] = & sdm845_rf_clk2_ao .hw ,
532+ [RPMH_RF_CLK3 ] = & sdm845_rf_clk3 .hw ,
533+ [RPMH_RF_CLK3_A ] = & sdm845_rf_clk3_ao .hw ,
534+ [RPMH_RF_CLK4 ] = & sm8350_rf_clk4 .hw ,
535+ [RPMH_RF_CLK4_A ] = & sm8350_rf_clk4_ao .hw ,
536+ [RPMH_IPA_CLK ] = & sdm845_ipa .hw ,
537+ };
538+
539+ static const struct clk_rpmh_desc clk_rpmh_sm8450 = {
540+ .clks = sm8450_rpmh_clocks ,
541+ .num_clks = ARRAY_SIZE (sm8450_rpmh_clocks ),
542+ };
543+
518544static struct clk_hw * sc7280_rpmh_clocks [] = {
519545 [RPMH_CXO_CLK ] = & sc7280_bi_tcxo .hw ,
520546 [RPMH_CXO_CLK_A ] = & sc7280_bi_tcxo_ao .hw ,
@@ -672,6 +698,7 @@ static const struct of_device_id clk_rpmh_match_table[] = {
672698 { .compatible = "qcom,sm8150-rpmh-clk" , .data = & clk_rpmh_sm8150 },
673699 { .compatible = "qcom,sm8250-rpmh-clk" , .data = & clk_rpmh_sm8250 },
674700 { .compatible = "qcom,sm8350-rpmh-clk" , .data = & clk_rpmh_sm8350 },
701+ { .compatible = "qcom,sm8450-rpmh-clk" , .data = & clk_rpmh_sm8450 },
675702 { .compatible = "qcom,sc7280-rpmh-clk" , .data = & clk_rpmh_sc7280 },
676703 { }
677704};
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