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rmurphy-armwilldeacon
rmurphy-arm
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perf/arm-cmn: Add CMN-700 r3 support
CMN-700 r3 has a special configuration option for a so-called "Super Home Node", which is a superset of the standard HN-F that also manages remote-chip coherency for multi-chip setups. As such it has a similar but expanded set of PMU events compared to HN-F, with some additional filtering options to boot. Signed-off-by: Robin Murphy <robin.murphy@arm.com> Link: https://lore.kernel.org/r/49153b72253f6af0e625cb55b9e1b825b110c49c.1688746690.git.robin.murphy@arm.com Signed-off-by: Will Deacon <will@kernel.org>
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‎drivers/perf/arm-cmn.c‎

Lines changed: 94 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -72,6 +72,8 @@
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/* For most nodes, this is all there is */
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#define CMN_PMU_EVENT_SEL 0x000
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#define CMN__PMU_CBUSY_SNTHROTTLE_SEL GENMASK_ULL(44, 42)
75+
#define CMN__PMU_SN_HOME_SEL GENMASK_ULL(40, 39)
76+
#define CMN__PMU_HBT_LBT_SEL GENMASK_ULL(38, 37)
7577
#define CMN__PMU_CLASS_OCCUP_ID GENMASK_ULL(36, 35)
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/* Technically this is 4 bits wide on DNs, but we only use 2 there anyway */
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#define CMN__PMU_OCCUP1_ID GENMASK_ULL(34, 32)
@@ -226,6 +228,7 @@ enum cmn_revision {
226228
REV_CMN700_R0P0 = 0,
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REV_CMN700_R1P0,
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REV_CMN700_R2P0,
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REV_CMN700_R3P0,
229232
REV_CI700_R0P0 = 0,
230233
REV_CI700_R1P0,
231234
REV_CI700_R2P0,
@@ -254,6 +257,9 @@ enum cmn_node_type {
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CMN_TYPE_CCHA,
255258
CMN_TYPE_CCLA,
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CMN_TYPE_CCLA_RNI,
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CMN_TYPE_HNS = 0x200,
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CMN_TYPE_HNS_MPAM_S,
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CMN_TYPE_HNS_MPAM_NS,
257263
/* Not a real node type */
258264
CMN_TYPE_WP = 0x7770
259265
};
@@ -263,6 +269,8 @@ enum cmn_filter_select {
263269
SEL_OCCUP1ID,
264270
SEL_CLASS_OCCUP_ID,
265271
SEL_CBUSY_SNTHROTTLE_SEL,
272+
SEL_HBT_LBT_SEL,
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SEL_SN_HOME_SEL,
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SEL_MAX
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};
268276

@@ -768,6 +776,8 @@ static umode_t arm_cmn_event_attr_is_visible(struct kobject *kobj,
768776
CMN_EVENT_ATTR(CMN_ANY, ccla_##_name, CMN_TYPE_CCLA, _event)
769777
#define CMN_EVENT_CCLA_RNI(_name, _event) \
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CMN_EVENT_ATTR(CMN_ANY, ccla_rni_##_name, CMN_TYPE_CCLA_RNI, _event)
779+
#define CMN_EVENT_HNS(_name, _event) \
780+
CMN_EVENT_ATTR(CMN_ANY, hns_##_name, CMN_TYPE_HNS, _event)
771781

772782
#define CMN_EVENT_DVM(_model, _name, _event) \
773783
_CMN_EVENT_DVM(_model, _name, _event, 0, SEL_NONE)
@@ -803,6 +813,23 @@ static umode_t arm_cmn_event_attr_is_visible(struct kobject *kobj,
803813
#define CMN_EVENT_HNF_SNT(_model, _name, _event) \
804814
CMN_EVENT_HN_SNT(_model, hnf_##_name, CMN_TYPE_HNF, _event)
805815

816+
#define CMN_EVENT_HNS_OCC(_name, _event) \
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CMN_EVENT_HN_OCC(CMN_ANY, hns_##_name, CMN_TYPE_HNS, _event), \
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_CMN_EVENT_ATTR(CMN_ANY, hns_##_name##_rxsnp, CMN_TYPE_HNS, _event, 5, SEL_OCCUP1ID), \
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_CMN_EVENT_ATTR(CMN_ANY, hns_##_name##_lbt, CMN_TYPE_HNS, _event, 6, SEL_OCCUP1ID), \
820+
_CMN_EVENT_ATTR(CMN_ANY, hns_##_name##_hbt, CMN_TYPE_HNS, _event, 7, SEL_OCCUP1ID)
821+
#define CMN_EVENT_HNS_CLS( _name, _event) \
822+
CMN_EVENT_HN_CLS(CMN_ANY, hns_##_name, CMN_TYPE_HNS, _event)
823+
#define CMN_EVENT_HNS_SNT(_name, _event) \
824+
CMN_EVENT_HN_SNT(CMN_ANY, hns_##_name, CMN_TYPE_HNS, _event)
825+
#define CMN_EVENT_HNS_HBT(_name, _event) \
826+
_CMN_EVENT_ATTR(CMN_ANY, hns_##_name##_all, CMN_TYPE_HNS, _event, 0, SEL_HBT_LBT_SEL), \
827+
_CMN_EVENT_ATTR(CMN_ANY, hns_##_name##_hbt, CMN_TYPE_HNS, _event, 1, SEL_HBT_LBT_SEL), \
828+
_CMN_EVENT_ATTR(CMN_ANY, hns_##_name##_lbt, CMN_TYPE_HNS, _event, 2, SEL_HBT_LBT_SEL)
829+
#define CMN_EVENT_HNS_SNH(_name, _event) \
830+
_CMN_EVENT_ATTR(CMN_ANY, hns_##_name##_all, CMN_TYPE_HNS, _event, 0, SEL_SN_HOME_SEL), \
831+
_CMN_EVENT_ATTR(CMN_ANY, hns_##_name##_sn, CMN_TYPE_HNS, _event, 1, SEL_SN_HOME_SEL), \
832+
_CMN_EVENT_ATTR(CMN_ANY, hns_##_name##_home, CMN_TYPE_HNS, _event, 2, SEL_SN_HOME_SEL)
806833

807834
#define _CMN_EVENT_XP_MESH(_name, _event) \
808835
__CMN_EVENT_XP(e_##_name, (_event) | (0 << 2)), \
@@ -1151,6 +1178,66 @@ static struct attribute *arm_cmn_event_attrs[] = {
11511178
CMN_EVENT_CCLA(pfwd_sndr_stalls_static_crd, 0x2a),
11521179
CMN_EVENT_CCLA(pfwd_sndr_stalls_dynmaic_crd, 0x2b),
11531180

1181+
CMN_EVENT_HNS_HBT(cache_miss, 0x01),
1182+
CMN_EVENT_HNS_HBT(slc_sf_cache_access, 0x02),
1183+
CMN_EVENT_HNS_HBT(cache_fill, 0x03),
1184+
CMN_EVENT_HNS_HBT(pocq_retry, 0x04),
1185+
CMN_EVENT_HNS_HBT(pocq_reqs_recvd, 0x05),
1186+
CMN_EVENT_HNS_HBT(sf_hit, 0x06),
1187+
CMN_EVENT_HNS_HBT(sf_evictions, 0x07),
1188+
CMN_EVENT_HNS(dir_snoops_sent, 0x08),
1189+
CMN_EVENT_HNS(brd_snoops_sent, 0x09),
1190+
CMN_EVENT_HNS_HBT(slc_eviction, 0x0a),
1191+
CMN_EVENT_HNS_HBT(slc_fill_invalid_way, 0x0b),
1192+
CMN_EVENT_HNS(mc_retries_local, 0x0c),
1193+
CMN_EVENT_HNS_SNH(mc_reqs_local, 0x0d),
1194+
CMN_EVENT_HNS(qos_hh_retry, 0x0e),
1195+
CMN_EVENT_HNS_OCC(qos_pocq_occupancy, 0x0f),
1196+
CMN_EVENT_HNS(pocq_addrhaz, 0x10),
1197+
CMN_EVENT_HNS(pocq_atomic_addrhaz, 0x11),
1198+
CMN_EVENT_HNS(ld_st_swp_adq_full, 0x12),
1199+
CMN_EVENT_HNS(cmp_adq_full, 0x13),
1200+
CMN_EVENT_HNS(txdat_stall, 0x14),
1201+
CMN_EVENT_HNS(txrsp_stall, 0x15),
1202+
CMN_EVENT_HNS(seq_full, 0x16),
1203+
CMN_EVENT_HNS(seq_hit, 0x17),
1204+
CMN_EVENT_HNS(snp_sent, 0x18),
1205+
CMN_EVENT_HNS(sfbi_dir_snp_sent, 0x19),
1206+
CMN_EVENT_HNS(sfbi_brd_snp_sent, 0x1a),
1207+
CMN_EVENT_HNS(intv_dirty, 0x1c),
1208+
CMN_EVENT_HNS(stash_snp_sent, 0x1d),
1209+
CMN_EVENT_HNS(stash_data_pull, 0x1e),
1210+
CMN_EVENT_HNS(snp_fwded, 0x1f),
1211+
CMN_EVENT_HNS(atomic_fwd, 0x20),
1212+
CMN_EVENT_HNS(mpam_hardlim, 0x21),
1213+
CMN_EVENT_HNS(mpam_softlim, 0x22),
1214+
CMN_EVENT_HNS(snp_sent_cluster, 0x23),
1215+
CMN_EVENT_HNS(sf_imprecise_evict, 0x24),
1216+
CMN_EVENT_HNS(sf_evict_shared_line, 0x25),
1217+
CMN_EVENT_HNS_CLS(pocq_class_occup, 0x26),
1218+
CMN_EVENT_HNS_CLS(pocq_class_retry, 0x27),
1219+
CMN_EVENT_HNS_CLS(class_mc_reqs_local, 0x28),
1220+
CMN_EVENT_HNS_CLS(class_cgnt_cmin, 0x29),
1221+
CMN_EVENT_HNS_SNT(sn_throttle, 0x2a),
1222+
CMN_EVENT_HNS_SNT(sn_throttle_min, 0x2b),
1223+
CMN_EVENT_HNS(sf_precise_to_imprecise, 0x2c),
1224+
CMN_EVENT_HNS(snp_intv_cln, 0x2d),
1225+
CMN_EVENT_HNS(nc_excl, 0x2e),
1226+
CMN_EVENT_HNS(excl_mon_ovfl, 0x2f),
1227+
CMN_EVENT_HNS(snp_req_recvd, 0x30),
1228+
CMN_EVENT_HNS(snp_req_byp_pocq, 0x31),
1229+
CMN_EVENT_HNS(dir_ccgha_snp_sent, 0x32),
1230+
CMN_EVENT_HNS(brd_ccgha_snp_sent, 0x33),
1231+
CMN_EVENT_HNS(ccgha_snp_stall, 0x34),
1232+
CMN_EVENT_HNS(lbt_req_hardlim, 0x35),
1233+
CMN_EVENT_HNS(hbt_req_hardlim, 0x36),
1234+
CMN_EVENT_HNS(sf_reupdate, 0x37),
1235+
CMN_EVENT_HNS(excl_sf_imprecise, 0x38),
1236+
CMN_EVENT_HNS(snp_pocq_addrhaz, 0x39),
1237+
CMN_EVENT_HNS(mc_retries_remote, 0x3a),
1238+
CMN_EVENT_HNS_SNH(mc_reqs_remote, 0x3b),
1239+
CMN_EVENT_HNS_CLS(class_mc_reqs_remote, 0x3c),
1240+
11541241
NULL
11551242
};
11561243

@@ -1392,6 +1479,10 @@ static int arm_cmn_set_event_sel_hi(struct arm_cmn_node *dn,
13921479
dn->occupid[fsel].val = occupid;
13931480
reg = FIELD_PREP(CMN__PMU_CBUSY_SNTHROTTLE_SEL,
13941481
dn->occupid[SEL_CBUSY_SNTHROTTLE_SEL].val) |
1482+
FIELD_PREP(CMN__PMU_SN_HOME_SEL,
1483+
dn->occupid[SEL_SN_HOME_SEL].val) |
1484+
FIELD_PREP(CMN__PMU_HBT_LBT_SEL,
1485+
dn->occupid[SEL_HBT_LBT_SEL].val) |
13951486
FIELD_PREP(CMN__PMU_CLASS_OCCUP_ID,
13961487
dn->occupid[SEL_CLASS_OCCUP_ID].val) |
13971488
FIELD_PREP(CMN__PMU_OCCUP1_ID,
@@ -2219,13 +2310,16 @@ static int arm_cmn_discover(struct arm_cmn *cmn, unsigned int rgn_offset)
22192310
case CMN_TYPE_CCRA:
22202311
case CMN_TYPE_CCHA:
22212312
case CMN_TYPE_CCLA:
2313+
case CMN_TYPE_HNS:
22222314
dn++;
22232315
break;
22242316
/* Nothing to see here */
22252317
case CMN_TYPE_MPAM_S:
22262318
case CMN_TYPE_MPAM_NS:
22272319
case CMN_TYPE_RNSAM:
22282320
case CMN_TYPE_CXLA:
2321+
case CMN_TYPE_HNS_MPAM_S:
2322+
case CMN_TYPE_HNS_MPAM_NS:
22292323
break;
22302324
/*
22312325
* Split "optimised" combination nodes into separate

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