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brooniewilldeacon
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arm64/sve: Skip flushing Z registers with 128 bit vectors
When the SVE vector length is 128 bits then there are no bits in the Z registers which are not shared with the V registers so we can skip them when zeroing state not shared with FPSIMD, this results in a minor performance improvement. Signed-off-by: Mark Brown <broonie@kernel.org> Reviewed-by: Dave Martin <Dave.Martin@arm.com> Acked-by: Catalin Marinas <catalin.marinas@arm.com> Link: https://lore.kernel.org/r/20210512151131.27877-4-broonie@kernel.org Signed-off-by: Will Deacon <will@kernel.org>
1 parent c9f6890 commit ad4711f

3 files changed

Lines changed: 15 additions & 5 deletions

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arch/arm64/include/asm/fpsimd.h

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -69,7 +69,7 @@ static inline void *sve_pffr(struct thread_struct *thread)
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extern void sve_save_state(void *state, u32 *pfpsr);
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extern void sve_load_state(void const *state, u32 const *pfpsr,
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unsigned long vq_minus_1);
72-
extern void sve_flush_live(void);
72+
extern void sve_flush_live(unsigned long vq_minus_1);
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extern void sve_load_from_fpsimd_state(struct user_fpsimd_state const *state,
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unsigned long vq_minus_1);
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extern unsigned int sve_get_vl(void);

arch/arm64/kernel/entry-fpsimd.S

Lines changed: 10 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -69,10 +69,18 @@ SYM_FUNC_START(sve_load_from_fpsimd_state)
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ret
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SYM_FUNC_END(sve_load_from_fpsimd_state)
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72-
/* Zero all SVE registers but the first 128-bits of each vector */
72+
/*
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* Zero all SVE registers but the first 128-bits of each vector
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*
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* VQ must already be configured by caller, any further updates of VQ
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* will need to ensure that the register state remains valid.
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*
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* x0 = VQ - 1
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*/
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SYM_FUNC_START(sve_flush_live)
81+
cbz x0, 1f // A VQ-1 of 0 is 128 bits so no extra Z state
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sve_flush_z
75-
sve_flush_p_ffr
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1: sve_flush_p_ffr
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ret
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SYM_FUNC_END(sve_flush_live)
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arch/arm64/kernel/fpsimd.c

Lines changed: 4 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -957,8 +957,10 @@ void do_sve_acc(unsigned int esr, struct pt_regs *regs)
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* disabling the trap, otherwise update our in-memory copy.
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*/
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if (!test_thread_flag(TIF_FOREIGN_FPSTATE)) {
960-
sve_set_vq(sve_vq_from_vl(current->thread.sve_vl) - 1);
961-
sve_flush_live();
960+
unsigned long vq_minus_one =
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sve_vq_from_vl(current->thread.sve_vl) - 1;
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sve_set_vq(vq_minus_one);
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sve_flush_live(vq_minus_one);
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fpsimd_bind_task_to_cpu();
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} else {
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fpsimd_to_sve(current);

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