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AngeloGioacchino Del RegnoUlf Hansson
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pmdomain: mediatek: Handle SoCs with inverted SRAM power-down bits
Some SoCs, and even some subsystems in the same SoC, may have the logic for SRAM power-down inverted, as in, setting the bit means "power down" and unsetting means "power up": this is because some hardware subsystems use this as a power-lock indication and some use this as a power down one (for example, usually, the modem ss has it inverted!). In preparation for adding support for power domains with inverted SRAM_PDN bits, add a new MTK_SCPD_SRAM_PDN_INVERTED flag and check for it in scpsys_sram_enable() and scpsys_sram_disable(). Reviewed-by: Nícolas F. R. A. Prado <nfraprado@collabora.com> Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> Link: https://lore.kernel.org/r/20250805074746.29457-6-angelogioacchino.delregno@collabora.com Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
1 parent c29345f commit ad4bbdc

2 files changed

Lines changed: 21 additions & 7 deletions

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drivers/pmdomain/mediatek/mtk-pm-domains.c

Lines changed: 20 additions & 7 deletions
Original file line numberDiff line numberDiff line change
@@ -79,16 +79,23 @@ static bool scpsys_domain_is_on(struct scpsys_domain *pd)
7979

8080
static int scpsys_sram_enable(struct scpsys_domain *pd)
8181
{
82-
u32 pdn_ack = pd->data->sram_pdn_ack_bits;
82+
u32 expected_ack, pdn_ack = pd->data->sram_pdn_ack_bits;
8383
struct scpsys *scpsys = pd->scpsys;
8484
unsigned int tmp;
8585
int ret;
8686

87-
regmap_clear_bits(scpsys->base, pd->data->ctl_offs, pd->data->sram_pdn_bits);
87+
if (MTK_SCPD_CAPS(pd, MTK_SCPD_SRAM_PDN_INVERTED)) {
88+
regmap_set_bits(scpsys->base, pd->data->ctl_offs, pd->data->sram_pdn_bits);
89+
expected_ack = pdn_ack;
90+
} else {
91+
regmap_clear_bits(scpsys->base, pd->data->ctl_offs, pd->data->sram_pdn_bits);
92+
expected_ack = 0;
93+
}
8894

8995
/* Either wait until SRAM_PDN_ACK all 1 or 0 */
9096
ret = regmap_read_poll_timeout(scpsys->base, pd->data->ctl_offs, tmp,
91-
(tmp & pdn_ack) == 0, MTK_POLL_DELAY_US, MTK_POLL_TIMEOUT);
97+
(tmp & pdn_ack) == expected_ack,
98+
MTK_POLL_DELAY_US, MTK_POLL_TIMEOUT);
9299
if (ret < 0)
93100
return ret;
94101

@@ -103,7 +110,7 @@ static int scpsys_sram_enable(struct scpsys_domain *pd)
103110

104111
static int scpsys_sram_disable(struct scpsys_domain *pd)
105112
{
106-
u32 pdn_ack = pd->data->sram_pdn_ack_bits;
113+
u32 expected_ack, pdn_ack = pd->data->sram_pdn_ack_bits;
107114
struct scpsys *scpsys = pd->scpsys;
108115
unsigned int tmp;
109116

@@ -113,12 +120,18 @@ static int scpsys_sram_disable(struct scpsys_domain *pd)
113120
regmap_clear_bits(scpsys->base, pd->data->ctl_offs, PWR_SRAM_ISOINT_B_BIT);
114121
}
115122

116-
regmap_set_bits(scpsys->base, pd->data->ctl_offs, pd->data->sram_pdn_bits);
123+
if (MTK_SCPD_CAPS(pd, MTK_SCPD_SRAM_PDN_INVERTED)) {
124+
regmap_clear_bits(scpsys->base, pd->data->ctl_offs, pd->data->sram_pdn_bits);
125+
expected_ack = 0;
126+
} else {
127+
regmap_set_bits(scpsys->base, pd->data->ctl_offs, pd->data->sram_pdn_bits);
128+
expected_ack = pdn_ack;
129+
}
117130

118131
/* Either wait until SRAM_PDN_ACK all 1 or 0 */
119132
return regmap_read_poll_timeout(scpsys->base, pd->data->ctl_offs, tmp,
120-
(tmp & pdn_ack) == pdn_ack, MTK_POLL_DELAY_US,
121-
MTK_POLL_TIMEOUT);
133+
(tmp & pdn_ack) == expected_ack,
134+
MTK_POLL_DELAY_US, MTK_POLL_TIMEOUT);
122135
}
123136

124137
static struct regmap *scpsys_bus_protect_get_regmap(struct scpsys_domain *pd,

drivers/pmdomain/mediatek/mtk-pm-domains.h

Lines changed: 1 addition & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -13,6 +13,7 @@
1313
#define MTK_SCPD_EXT_BUCK_ISO BIT(6)
1414
#define MTK_SCPD_HAS_INFRA_NAO BIT(7)
1515
#define MTK_SCPD_STRICT_BUS_PROTECTION BIT(8)
16+
#define MTK_SCPD_SRAM_PDN_INVERTED BIT(9)
1617
#define MTK_SCPD_CAPS(_scpd, _x) ((_scpd)->data->caps & (_x))
1718

1819
#define SPM_VDE_PWR_CON 0x0210

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