@@ -92,11 +92,10 @@ static void aic5_mask(struct irq_data *d)
9292 * Disable interrupt on AIC5. We always take the lock of the
9393 * first irq chip as all chips share the same registers.
9494 */
95- irq_gc_lock ( bgc );
95+ guard ( raw_spinlock )( & bgc -> lock );
9696 irq_reg_writel (gc , d -> hwirq , AT91_AIC5_SSR );
9797 irq_reg_writel (gc , 1 , AT91_AIC5_IDCR );
9898 gc -> mask_cache &= ~d -> mask ;
99- irq_gc_unlock (bgc );
10099}
101100
102101static void aic5_unmask (struct irq_data * d )
@@ -109,11 +108,10 @@ static void aic5_unmask(struct irq_data *d)
109108 * Enable interrupt on AIC5. We always take the lock of the
110109 * first irq chip as all chips share the same registers.
111110 */
112- irq_gc_lock ( bgc );
111+ guard ( raw_spinlock )( & bgc -> lock );
113112 irq_reg_writel (gc , d -> hwirq , AT91_AIC5_SSR );
114113 irq_reg_writel (gc , 1 , AT91_AIC5_IECR );
115114 gc -> mask_cache |= d -> mask ;
116- irq_gc_unlock (bgc );
117115}
118116
119117static int aic5_retrigger (struct irq_data * d )
@@ -122,11 +120,9 @@ static int aic5_retrigger(struct irq_data *d)
122120 struct irq_chip_generic * bgc = irq_get_domain_generic_chip (domain , 0 );
123121
124122 /* Enable interrupt on AIC5 */
125- irq_gc_lock ( bgc );
123+ guard ( raw_spinlock )( & bgc -> lock );
126124 irq_reg_writel (bgc , d -> hwirq , AT91_AIC5_SSR );
127125 irq_reg_writel (bgc , 1 , AT91_AIC5_ISCR );
128- irq_gc_unlock (bgc );
129-
130126 return 1 ;
131127}
132128
@@ -137,14 +133,12 @@ static int aic5_set_type(struct irq_data *d, unsigned type)
137133 unsigned int smr ;
138134 int ret ;
139135
140- irq_gc_lock ( bgc );
136+ guard ( raw_spinlock )( & bgc -> lock );
141137 irq_reg_writel (bgc , d -> hwirq , AT91_AIC5_SSR );
142138 smr = irq_reg_readl (bgc , AT91_AIC5_SMR );
143139 ret = aic_common_set_type (d , type , & smr );
144140 if (!ret )
145141 irq_reg_writel (bgc , smr , AT91_AIC5_SMR );
146- irq_gc_unlock (bgc );
147-
148142 return ret ;
149143}
150144
@@ -166,7 +160,7 @@ static void aic5_suspend(struct irq_data *d)
166160 smr_cache [i ] = irq_reg_readl (bgc , AT91_AIC5_SMR );
167161 }
168162
169- irq_gc_lock ( bgc );
163+ guard ( raw_spinlock )( & bgc -> lock );
170164 for (i = 0 ; i < dgc -> irqs_per_chip ; i ++ ) {
171165 mask = 1 << i ;
172166 if ((mask & gc -> mask_cache ) == (mask & gc -> wake_active ))
@@ -178,7 +172,6 @@ static void aic5_suspend(struct irq_data *d)
178172 else
179173 irq_reg_writel (bgc , 1 , AT91_AIC5_IDCR );
180174 }
181- irq_gc_unlock (bgc );
182175}
183176
184177static void aic5_resume (struct irq_data * d )
@@ -190,7 +183,7 @@ static void aic5_resume(struct irq_data *d)
190183 int i ;
191184 u32 mask ;
192185
193- irq_gc_lock ( bgc );
186+ guard ( raw_spinlock )( & bgc -> lock );
194187
195188 if (smr_cache ) {
196189 irq_reg_writel (bgc , 0xffffffff , AT91_AIC5_SPU );
@@ -214,7 +207,6 @@ static void aic5_resume(struct irq_data *d)
214207 else
215208 irq_reg_writel (bgc , 1 , AT91_AIC5_IDCR );
216209 }
217- irq_gc_unlock (bgc );
218210}
219211
220212static void aic5_pm_shutdown (struct irq_data * d )
@@ -225,13 +217,12 @@ static void aic5_pm_shutdown(struct irq_data *d)
225217 struct irq_chip_generic * gc = irq_data_get_irq_chip_data (d );
226218 int i ;
227219
228- irq_gc_lock ( bgc );
220+ guard ( raw_spinlock )( & bgc -> lock );
229221 for (i = 0 ; i < dgc -> irqs_per_chip ; i ++ ) {
230222 irq_reg_writel (bgc , i + gc -> irq_base , AT91_AIC5_SSR );
231223 irq_reg_writel (bgc , 1 , AT91_AIC5_IDCR );
232224 irq_reg_writel (bgc , 1 , AT91_AIC5_ICCR );
233225 }
234- irq_gc_unlock (bgc );
235226}
236227#else
237228#define aic5_suspend NULL
@@ -277,7 +268,6 @@ static int aic5_irq_domain_xlate(struct irq_domain *d,
277268 unsigned int * out_type )
278269{
279270 struct irq_chip_generic * bgc = irq_get_domain_generic_chip (d , 0 );
280- unsigned long flags ;
281271 unsigned smr ;
282272 int ret ;
283273
@@ -289,13 +279,11 @@ static int aic5_irq_domain_xlate(struct irq_domain *d,
289279 if (ret )
290280 return ret ;
291281
292- irq_gc_lock_irqsave ( bgc , flags );
282+ guard ( raw_spinlock_irq )( & bgc -> lock );
293283 irq_reg_writel (bgc , * out_hwirq , AT91_AIC5_SSR );
294284 smr = irq_reg_readl (bgc , AT91_AIC5_SMR );
295285 aic_common_set_priority (intspec [2 ], & smr );
296286 irq_reg_writel (bgc , smr , AT91_AIC5_SMR );
297- irq_gc_unlock_irqrestore (bgc , flags );
298-
299287 return ret ;
300288}
301289
0 commit comments