@@ -2300,9 +2300,8 @@ static irqreturn_t irq_handler(int irq, void *data)
23002300 handle_dead_contexts (ohci );
23012301
23022302 if (event & OHCI1394_cycle64Seconds ) {
2303- spin_lock (& ohci -> lock );
2303+ guard ( spinlock ) (& ohci -> lock );
23042304 update_bus_time (ohci );
2305- spin_unlock (& ohci -> lock );
23062305 } else
23072306 flush_writes (ohci );
23082307
@@ -2762,7 +2761,6 @@ static int ohci_enable_phys_dma(struct fw_card *card,
27622761static u32 ohci_read_csr (struct fw_card * card , int csr_offset )
27632762{
27642763 struct fw_ohci * ohci = fw_ohci (card );
2765- unsigned long flags ;
27662764 u32 value ;
27672765
27682766 switch (csr_offset ) {
@@ -2786,16 +2784,14 @@ static u32 ohci_read_csr(struct fw_card *card, int csr_offset)
27862784 return get_cycle_time (ohci );
27872785
27882786 case CSR_BUS_TIME :
2789- /*
2790- * We might be called just after the cycle timer has wrapped
2791- * around but just before the cycle64Seconds handler, so we
2792- * better check here, too, if the bus time needs to be updated.
2793- */
2794- spin_lock_irqsave (& ohci -> lock , flags );
2795- value = update_bus_time (ohci );
2796- spin_unlock_irqrestore (& ohci -> lock , flags );
2797- return value ;
2787+ {
2788+ // We might be called just after the cycle timer has wrapped around but just before
2789+ // the cycle64Seconds handler, so we better check here, too, if the bus time needs
2790+ // to be updated.
27982791
2792+ guard (spinlock_irqsave )(& ohci -> lock );
2793+ return update_bus_time (ohci );
2794+ }
27992795 case CSR_BUSY_TIMEOUT :
28002796 value = reg_read (ohci , OHCI1394_ATRetries );
28012797 return (value >> 4 ) & 0x0ffff00f ;
@@ -2813,7 +2809,6 @@ static u32 ohci_read_csr(struct fw_card *card, int csr_offset)
28132809static void ohci_write_csr (struct fw_card * card , int csr_offset , u32 value )
28142810{
28152811 struct fw_ohci * ohci = fw_ohci (card );
2816- unsigned long flags ;
28172812
28182813 switch (csr_offset ) {
28192814 case CSR_STATE_CLEAR :
@@ -2849,12 +2844,11 @@ static void ohci_write_csr(struct fw_card *card, int csr_offset, u32 value)
28492844 break ;
28502845
28512846 case CSR_BUS_TIME :
2852- spin_lock_irqsave (& ohci -> lock , flags );
2853- ohci -> bus_time = (update_bus_time (ohci ) & 0x40 ) |
2854- (value & ~0x7f );
2855- spin_unlock_irqrestore (& ohci -> lock , flags );
2847+ {
2848+ guard (spinlock_irqsave )(& ohci -> lock );
2849+ ohci -> bus_time = (update_bus_time (ohci ) & 0x40 ) | (value & ~0x7f );
28562850 break ;
2857-
2851+ }
28582852 case CSR_BUSY_TIMEOUT :
28592853 value = (value & 0xf ) | ((value & 0xf ) << 4 ) |
28602854 ((value & 0xf ) << 8 ) | ((value & 0x0ffff000 ) << 4 );
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