1212#include <linux/mcb.h>
1313#include <linux/bitops.h>
1414#include <linux/gpio/driver.h>
15+ #include <linux/gpio/generic.h>
1516
1617#define MEN_Z127_CTRL 0x00
1718#define MEN_Z127_PSR 0x04
3031 (db <= MEN_Z127_DB_MAX_US))
3132
3233struct men_z127_gpio {
33- struct gpio_chip gc ;
34+ struct gpio_generic_chip chip ;
3435 void __iomem * reg_base ;
3536 struct resource * mem ;
3637};
@@ -64,7 +65,7 @@ static int men_z127_debounce(struct gpio_chip *gc, unsigned gpio,
6465 debounce /= 50 ;
6566 }
6667
67- raw_spin_lock ( & gc -> bgpio_lock );
68+ guard ( gpio_generic_lock )( & priv -> chip );
6869
6970 db_en = readl (priv -> reg_base + MEN_Z127_DBER );
7071
@@ -79,8 +80,6 @@ static int men_z127_debounce(struct gpio_chip *gc, unsigned gpio,
7980 writel (db_en , priv -> reg_base + MEN_Z127_DBER );
8081 writel (db_cnt , priv -> reg_base + GPIO_TO_DBCNT_REG (gpio ));
8182
82- raw_spin_unlock (& gc -> bgpio_lock );
83-
8483 return 0 ;
8584}
8685
@@ -91,7 +90,8 @@ static int men_z127_set_single_ended(struct gpio_chip *gc,
9190 struct men_z127_gpio * priv = gpiochip_get_data (gc );
9291 u32 od_en ;
9392
94- raw_spin_lock (& gc -> bgpio_lock );
93+ guard (gpio_generic_lock )(& priv -> chip );
94+
9595 od_en = readl (priv -> reg_base + MEN_Z127_ODER );
9696
9797 if (param == PIN_CONFIG_DRIVE_OPEN_DRAIN )
@@ -101,7 +101,6 @@ static int men_z127_set_single_ended(struct gpio_chip *gc,
101101 od_en &= ~BIT (offset );
102102
103103 writel (od_en , priv -> reg_base + MEN_Z127_ODER );
104- raw_spin_unlock (& gc -> bgpio_lock );
105104
106105 return 0 ;
107106}
@@ -137,6 +136,7 @@ static void men_z127_release_mem(void *data)
137136static int men_z127_probe (struct mcb_device * mdev ,
138137 const struct mcb_device_id * id )
139138{
139+ struct gpio_generic_chip_config config ;
140140 struct men_z127_gpio * men_z127_gpio ;
141141 struct device * dev = & mdev -> dev ;
142142 int ret ;
@@ -163,18 +163,21 @@ static int men_z127_probe(struct mcb_device *mdev,
163163
164164 mcb_set_drvdata (mdev , men_z127_gpio );
165165
166- ret = bgpio_init (& men_z127_gpio -> gc , & mdev -> dev , 4 ,
167- men_z127_gpio -> reg_base + MEN_Z127_PSR ,
168- men_z127_gpio -> reg_base + MEN_Z127_CTRL ,
169- NULL ,
170- men_z127_gpio -> reg_base + MEN_Z127_GPIODR ,
171- NULL , 0 );
166+ config = (struct gpio_generic_chip_config ) {
167+ .dev = & mdev -> dev ,
168+ .sz = 4 ,
169+ .dat = men_z127_gpio -> reg_base + MEN_Z127_PSR ,
170+ .set = men_z127_gpio -> reg_base + MEN_Z127_CTRL ,
171+ .dirout = men_z127_gpio -> reg_base + MEN_Z127_GPIODR ,
172+ };
173+
174+ ret = gpio_generic_chip_init (& men_z127_gpio -> chip , & config );
172175 if (ret )
173176 return ret ;
174177
175- men_z127_gpio -> gc .set_config = men_z127_set_config ;
178+ men_z127_gpio -> chip . gc .set_config = men_z127_set_config ;
176179
177- ret = devm_gpiochip_add_data (dev , & men_z127_gpio -> gc , men_z127_gpio );
180+ ret = devm_gpiochip_add_data (dev , & men_z127_gpio -> chip . gc , men_z127_gpio );
178181 if (ret )
179182 return dev_err_probe (dev , ret ,
180183 "failed to register MEN 16Z127 GPIO controller" );
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