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muralimk-amdbp3tk0v
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EDAC/amd64: Split read_base_mask() into dct/umc functions
Call them from their respective hw_info_get() paths. Call the new functions after the setting the chip select base and mask counts, since those are need to read the correct number of chip select base and mask registers. And call the new functions before the remaining set up, because the base and mask register values will be needed later. [Yazen: Rebased/reworked patch and reworded commit message. ] Signed-off-by: Muralidhara M K <muralidhara.mk@amd.com> Co-developed-by: Naveen Krishna Chatradhi <naveenkrishna.chatradhi@amd.com> Signed-off-by: Naveen Krishna Chatradhi <naveenkrishna.chatradhi@amd.com> Co-developed-by: Yazen Ghannam <yazen.ghannam@amd.com> Signed-off-by: Yazen Ghannam <yazen.ghannam@amd.com> Signed-off-by: Borislav Petkov (AMD) <bp@alien8.de> Link: https://lore.kernel.org/r/20230127170419.1824692-14-yazen.ghannam@amd.com
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Lines changed: 4 additions & 6 deletions

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drivers/edac/amd64_edac.c

Lines changed: 4 additions & 6 deletions
Original file line numberDiff line numberDiff line change
@@ -1638,7 +1638,7 @@ static void umc_prep_chip_selects(struct amd64_pvt *pvt)
16381638
}
16391639
}
16401640

1641-
static void read_umc_base_mask(struct amd64_pvt *pvt)
1641+
static void umc_read_base_mask(struct amd64_pvt *pvt)
16421642
{
16431643
u32 umc_base_reg, umc_base_reg_sec;
16441644
u32 umc_mask_reg, umc_mask_reg_sec;
@@ -1692,13 +1692,10 @@ static void read_umc_base_mask(struct amd64_pvt *pvt)
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/*
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* Function 2 Offset F10_DCSB0; read in the DCS Base and DCS Mask registers
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*/
1695-
static void read_dct_base_mask(struct amd64_pvt *pvt)
1695+
static void dct_read_base_mask(struct amd64_pvt *pvt)
16961696
{
16971697
int cs;
16981698

1699-
if (pvt->umc)
1700-
return read_umc_base_mask(pvt);
1701-
17021699
for_each_chip_select(cs, 0, pvt) {
17031700
int reg0 = DCSB0 + (cs * 4);
17041701
int reg1 = DCSB1 + (cs * 4);
@@ -3185,7 +3182,6 @@ static void read_mc_regs(struct amd64_pvt *pvt)
31853182
}
31863183

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skip:
3188-
read_dct_base_mask(pvt);
31893185

31903186
determine_memory_type(pvt);
31913187

@@ -3666,6 +3662,7 @@ static int dct_hw_info_get(struct amd64_pvt *pvt)
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return ret;
36673663

36683664
dct_prep_chip_selects(pvt);
3665+
dct_read_base_mask(pvt);
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read_mc_regs(pvt);
36703667

36713668
return 0;
@@ -3678,6 +3675,7 @@ static int umc_hw_info_get(struct amd64_pvt *pvt)
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return -ENOMEM;
36793676

36803677
umc_prep_chip_selects(pvt);
3678+
umc_read_base_mask(pvt);
36813679
read_mc_regs(pvt);
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36833681
return 0;

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