@@ -97,7 +97,57 @@ void __init ralink_of_remap(void)
9797 panic ("Failed to remap core resources" );
9898}
9999
100- static void soc_dev_init (struct ralink_soc_info * soc_info , u32 rev )
100+ static unsigned int __init mt7621_get_soc_name0 (void )
101+ {
102+ return __raw_readl (MT7621_SYSC_BASE + SYSC_REG_CHIP_NAME0 );
103+ }
104+
105+ static unsigned int __init mt7621_get_soc_name1 (void )
106+ {
107+ return __raw_readl (MT7621_SYSC_BASE + SYSC_REG_CHIP_NAME1 );
108+ }
109+
110+ static bool __init mt7621_soc_valid (void )
111+ {
112+ if (mt7621_get_soc_name0 () == MT7621_CHIP_NAME0 &&
113+ mt7621_get_soc_name1 () == MT7621_CHIP_NAME1 )
114+ return true;
115+ else
116+ return false;
117+ }
118+
119+ static const char __init * mt7621_get_soc_id (void )
120+ {
121+ if (mt7621_soc_valid ())
122+ return "MT7621" ;
123+ else
124+ return "invalid" ;
125+ }
126+
127+ static unsigned int __init mt7621_get_soc_rev (void )
128+ {
129+ return __raw_readl (MT7621_SYSC_BASE + SYSC_REG_CHIP_REV );
130+ }
131+
132+ static unsigned int __init mt7621_get_soc_ver (void )
133+ {
134+ return (mt7621_get_soc_rev () >> CHIP_REV_VER_SHIFT ) & CHIP_REV_VER_MASK ;
135+ }
136+
137+ static unsigned int __init mt7621_get_soc_eco (void )
138+ {
139+ return (mt7621_get_soc_rev () & CHIP_REV_ECO_MASK );
140+ }
141+
142+ static const char __init * mt7621_get_soc_revision (void )
143+ {
144+ if (mt7621_get_soc_rev () == 1 && mt7621_get_soc_eco () == 1 )
145+ return "E2" ;
146+ else
147+ return "E1" ;
148+ }
149+
150+ static void soc_dev_init (struct ralink_soc_info * soc_info )
101151{
102152 struct soc_device * soc_dev ;
103153 struct soc_device_attribute * soc_dev_attr ;
@@ -108,12 +158,7 @@ static void soc_dev_init(struct ralink_soc_info *soc_info, u32 rev)
108158
109159 soc_dev_attr -> soc_id = "mt7621" ;
110160 soc_dev_attr -> family = "Ralink" ;
111-
112- if (((rev >> CHIP_REV_VER_SHIFT ) & CHIP_REV_VER_MASK ) == 1 &&
113- (rev & CHIP_REV_ECO_MASK ) == 1 )
114- soc_dev_attr -> revision = "E2" ;
115- else
116- soc_dev_attr -> revision = "E1" ;
161+ soc_dev_attr -> revision = mt7621_get_soc_revision ();
117162
118163 soc_dev_attr -> data = soc_info ;
119164
@@ -126,11 +171,6 @@ static void soc_dev_init(struct ralink_soc_info *soc_info, u32 rev)
126171
127172void __init prom_soc_init (struct ralink_soc_info * soc_info )
128173{
129- unsigned char * name = NULL ;
130- u32 n0 ;
131- u32 n1 ;
132- u32 rev ;
133-
134174 /* Early detection of CMP support */
135175 mips_cm_probe ();
136176 mips_cpc_probe ();
@@ -153,27 +193,23 @@ void __init prom_soc_init(struct ralink_soc_info *soc_info)
153193 __sync ();
154194 }
155195
156- n0 = __raw_readl (MT7621_SYSC_BASE + SYSC_REG_CHIP_NAME0 );
157- n1 = __raw_readl (MT7621_SYSC_BASE + SYSC_REG_CHIP_NAME1 );
158-
159- if (n0 == MT7621_CHIP_NAME0 && n1 == MT7621_CHIP_NAME1 ) {
160- name = "MT7621" ;
196+ if (mt7621_soc_valid ())
161197 soc_info -> compatible = "mediatek,mt7621-soc" ;
162- } else {
163- panic ("mt7621: unknown SoC, n0:%08x n1:%08x\n" , n0 , n1 );
164- }
198+ else
199+ panic ("mt7621: unknown SoC, n0:%08x n1:%08x\n" ,
200+ mt7621_get_soc_name0 (),
201+ mt7621_get_soc_name1 ());
165202 ralink_soc = MT762X_SOC_MT7621AT ;
166- rev = __raw_readl (MT7621_SYSC_BASE + SYSC_REG_CHIP_REV );
167203
168204 snprintf (soc_info -> sys_type , RAMIPS_SYS_TYPE_LEN ,
169205 "MediaTek %s ver:%u eco:%u" ,
170- name ,
171- ( rev >> CHIP_REV_VER_SHIFT ) & CHIP_REV_VER_MASK ,
172- ( rev & CHIP_REV_ECO_MASK ));
206+ mt7621_get_soc_id () ,
207+ mt7621_get_soc_ver () ,
208+ mt7621_get_soc_eco ( ));
173209
174210 soc_info -> mem_detect = mt7621_memory_detect ;
175211
176- soc_dev_init (soc_info , rev );
212+ soc_dev_init (soc_info );
177213
178214 if (!register_cps_smp_ops ())
179215 return ;
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