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Linus WalleijRussell King (Oracle)
Linus Walleij
authored and
Russell King (Oracle)
committed
ARM: 9387/2: mm: Rewrite cacheflush vtables in CFI safe C
Instead of defining all cache flush operations with an assembly macro in proc-macros.S, provide an explicit struct cpu_cache_fns for each CPU cache type in mm/cache.c. As a side effect from rewriting the vtables in C, we can avoid the aliasing for the "louis" cache callback, instead we can just assign the NN_flush_kern_cache_all() function to the louis callback in the C vtable. As the louis cache callback is called explicitly (not through the vtable) if we only have one type of cache support compiled in, we need an ifdef quirk for this in the !MULTI_CACHE case. Feroceon and XScale have some dma mapping quirk, in this case we can just define two structs and assign all but one callback to the main implementation; since each of them invoked define_cache_functions twice they require MULTI_CACHE by definition so the compiled-in shortcut is not used on these variants. Tested-by: Kees Cook <keescook@chromium.org> Reviewed-by: Sami Tolvanen <samitolvanen@google.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Russell King (Oracle) <rmk+kernel@armlinux.org.uk>
1 parent 2074bee commit b4d20ef

27 files changed

Lines changed: 688 additions & 259 deletions

‎arch/arm/include/asm/glue-cache.h‎

Lines changed: 9 additions & 19 deletions
Original file line numberDiff line numberDiff line change
@@ -118,6 +118,10 @@
118118
# define MULTI_CACHE 1
119119
#endif
120120

121+
#ifdef CONFIG_CPU_CACHE_NOP
122+
# define MULTI_CACHE 1
123+
#endif
124+
121125
#if defined(CONFIG_CPU_V7M)
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# define MULTI_CACHE 1
123127
#endif
@@ -126,29 +130,15 @@
126130
#error Unknown cache maintenance model
127131
#endif
128132

129-
#ifndef __ASSEMBLER__
130-
static inline void nop_flush_icache_all(void) { }
131-
static inline void nop_flush_kern_cache_all(void) { }
132-
static inline void nop_flush_kern_cache_louis(void) { }
133-
static inline void nop_flush_user_cache_all(void) { }
134-
static inline void nop_flush_user_cache_range(unsigned long a,
135-
unsigned long b, unsigned int c) { }
136-
137-
static inline void nop_coherent_kern_range(unsigned long a, unsigned long b) { }
138-
static inline int nop_coherent_user_range(unsigned long a,
139-
unsigned long b) { return 0; }
140-
static inline void nop_flush_kern_dcache_area(void *a, size_t s) { }
141-
142-
static inline void nop_dma_flush_range(const void *a, const void *b) { }
143-
144-
static inline void nop_dma_map_area(const void *s, size_t l, int f) { }
145-
static inline void nop_dma_unmap_area(const void *s, size_t l, int f) { }
146-
#endif
147-
148133
#ifndef MULTI_CACHE
149134
#define __cpuc_flush_icache_all __glue(_CACHE,_flush_icache_all)
150135
#define __cpuc_flush_kern_all __glue(_CACHE,_flush_kern_cache_all)
136+
/* This function only has a dedicated assembly callback on the v7 cache */
137+
#ifdef CONFIG_CPU_CACHE_V7
151138
#define __cpuc_flush_kern_louis __glue(_CACHE,_flush_kern_cache_louis)
139+
#else
140+
#define __cpuc_flush_kern_louis __glue(_CACHE,_flush_kern_cache_all)
141+
#endif
152142
#define __cpuc_flush_user_all __glue(_CACHE,_flush_user_cache_all)
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#define __cpuc_flush_user_range __glue(_CACHE,_flush_user_cache_range)
154144
#define __cpuc_coherent_kern_range __glue(_CACHE,_coherent_kern_range)

‎arch/arm/mm/Makefile‎

Lines changed: 1 addition & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -45,6 +45,7 @@ obj-$(CONFIG_CPU_CACHE_V7) += cache-v7.o
4545
obj-$(CONFIG_CPU_CACHE_FA) += cache-fa.o
4646
obj-$(CONFIG_CPU_CACHE_NOP) += cache-nop.o
4747
obj-$(CONFIG_CPU_CACHE_V7M) += cache-v7m.o
48+
obj-y += cache.o
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4950
obj-$(CONFIG_CPU_COPY_V4WT) += copypage-v4wt.o
5051
obj-$(CONFIG_CPU_COPY_V4WB) += copypage-v4wb.o

‎arch/arm/mm/cache-b15-rac.c‎

Lines changed: 1 addition & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -5,6 +5,7 @@
55
* Copyright (C) 2015-2016 Broadcom
66
*/
77

8+
#include <linux/cfi_types.h>
89
#include <linux/err.h>
910
#include <linux/spinlock.h>
1011
#include <linux/io.h>

‎arch/arm/mm/cache-fa.S‎

Lines changed: 0 additions & 8 deletions
Original file line numberDiff line numberDiff line change
@@ -243,11 +243,3 @@ SYM_FUNC_END(fa_dma_map_area)
243243
SYM_TYPED_FUNC_START(fa_dma_unmap_area)
244244
ret lr
245245
SYM_FUNC_END(fa_dma_unmap_area)
246-
247-
.globl fa_flush_kern_cache_louis
248-
.equ fa_flush_kern_cache_louis, fa_flush_kern_cache_all
249-
250-
__INITDATA
251-
252-
@ define struct cpu_cache_fns (see <asm/cacheflush.h> and proc-macros.S)
253-
define_cache_functions fa

‎arch/arm/mm/cache-nop.S‎

Lines changed: 0 additions & 8 deletions
Original file line numberDiff line numberDiff line change
@@ -18,9 +18,6 @@ SYM_TYPED_FUNC_START(nop_flush_kern_cache_all)
1818
ret lr
1919
SYM_FUNC_END(nop_flush_kern_cache_all)
2020

21-
.globl nop_flush_kern_cache_louis
22-
.equ nop_flush_kern_cache_louis, nop_flush_icache_all
23-
2421
SYM_TYPED_FUNC_START(nop_flush_user_cache_all)
2522
ret lr
2623
SYM_FUNC_END(nop_flush_user_cache_all)
@@ -50,11 +47,6 @@ SYM_TYPED_FUNC_START(nop_dma_map_area)
5047
ret lr
5148
SYM_FUNC_END(nop_dma_map_area)
5249

53-
__INITDATA
54-
55-
@ define struct cpu_cache_fns (see <asm/cacheflush.h> and proc-macros.S)
56-
define_cache_functions nop
57-
5850
SYM_TYPED_FUNC_START(nop_dma_unmap_area)
5951
ret lr
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SYM_FUNC_END(nop_dma_unmap_area)

‎arch/arm/mm/cache-v4.S‎

Lines changed: 0 additions & 8 deletions
Original file line numberDiff line numberDiff line change
@@ -144,11 +144,3 @@ SYM_FUNC_END(v4_dma_unmap_area)
144144
SYM_TYPED_FUNC_START(v4_dma_map_area)
145145
ret lr
146146
SYM_FUNC_END(v4_dma_map_area)
147-
148-
.globl v4_flush_kern_cache_louis
149-
.equ v4_flush_kern_cache_louis, v4_flush_kern_cache_all
150-
151-
__INITDATA
152-
153-
@ define struct cpu_cache_fns (see <asm/cacheflush.h> and proc-macros.S)
154-
define_cache_functions v4

‎arch/arm/mm/cache-v4wb.S‎

Lines changed: 0 additions & 8 deletions
Original file line numberDiff line numberDiff line change
@@ -253,11 +253,3 @@ SYM_FUNC_END(v4wb_dma_map_area)
253253
SYM_TYPED_FUNC_START(v4wb_dma_unmap_area)
254254
ret lr
255255
SYM_FUNC_END(v4wb_dma_unmap_area)
256-
257-
.globl v4wb_flush_kern_cache_louis
258-
.equ v4wb_flush_kern_cache_louis, v4wb_flush_kern_cache_all
259-
260-
__INITDATA
261-
262-
@ define struct cpu_cache_fns (see <asm/cacheflush.h> and proc-macros.S)
263-
define_cache_functions v4wb

‎arch/arm/mm/cache-v4wt.S‎

Lines changed: 0 additions & 8 deletions
Original file line numberDiff line numberDiff line change
@@ -200,11 +200,3 @@ SYM_FUNC_END(v4wt_dma_unmap_area)
200200
SYM_TYPED_FUNC_START(v4wt_dma_map_area)
201201
ret lr
202202
SYM_FUNC_END(v4wt_dma_map_area)
203-
204-
.globl v4wt_flush_kern_cache_louis
205-
.equ v4wt_flush_kern_cache_louis, v4wt_flush_kern_cache_all
206-
207-
__INITDATA
208-
209-
@ define struct cpu_cache_fns (see <asm/cacheflush.h> and proc-macros.S)
210-
define_cache_functions v4wt

‎arch/arm/mm/cache-v6.S‎

Lines changed: 0 additions & 8 deletions
Original file line numberDiff line numberDiff line change
@@ -298,11 +298,3 @@ SYM_TYPED_FUNC_START(v6_dma_unmap_area)
298298
bne v6_dma_inv_range
299299
ret lr
300300
SYM_FUNC_END(v6_dma_unmap_area)
301-
302-
.globl v6_flush_kern_cache_louis
303-
.equ v6_flush_kern_cache_louis, v6_flush_kern_cache_all
304-
305-
__INITDATA
306-
307-
@ define struct cpu_cache_fns (see <asm/cacheflush.h> and proc-macros.S)
308-
define_cache_functions v6

‎arch/arm/mm/cache-v7.S‎

Lines changed: 0 additions & 25 deletions
Original file line numberDiff line numberDiff line change
@@ -456,28 +456,3 @@ SYM_TYPED_FUNC_START(v7_dma_unmap_area)
456456
bne v7_dma_inv_range
457457
ret lr
458458
SYM_FUNC_END(v7_dma_unmap_area)
459-
460-
__INITDATA
461-
462-
@ define struct cpu_cache_fns (see <asm/cacheflush.h> and proc-macros.S)
463-
define_cache_functions v7
464-
465-
/* The Broadcom Brahma-B15 read-ahead cache requires some modifications
466-
* to the v7_cache_fns, we only override the ones we need
467-
*/
468-
#ifndef CONFIG_CACHE_B15_RAC
469-
globl_equ b15_flush_kern_cache_all, v7_flush_kern_cache_all
470-
#endif
471-
globl_equ b15_flush_icache_all, v7_flush_icache_all
472-
globl_equ b15_flush_kern_cache_louis, v7_flush_kern_cache_louis
473-
globl_equ b15_flush_user_cache_all, v7_flush_user_cache_all
474-
globl_equ b15_flush_user_cache_range, v7_flush_user_cache_range
475-
globl_equ b15_coherent_kern_range, v7_coherent_kern_range
476-
globl_equ b15_coherent_user_range, v7_coherent_user_range
477-
globl_equ b15_flush_kern_dcache_area, v7_flush_kern_dcache_area
478-
479-
globl_equ b15_dma_map_area, v7_dma_map_area
480-
globl_equ b15_dma_unmap_area, v7_dma_unmap_area
481-
globl_equ b15_dma_flush_range, v7_dma_flush_range
482-
483-
define_cache_functions b15

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