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jjian-zhouJassi Brar
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mailbox: mediatek: Add mtk-vcp-mailbox driver
Add mtk-vcp-mailbox driver to support the communication with VCP remote microprocessor. Signed-off-by: Jjian Zhou <jjian.zhou@mediatek.com> Reviewed-by: Chen-Yu Tsai <wenst@chromium.org> Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> Signed-off-by: Jassi Brar <jassisinghbrar@gmail.com>
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drivers/mailbox/Kconfig

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@@ -304,6 +304,15 @@ config MTK_GPUEB_MBOX
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Say Y or m here if you want to support the MT8196 SoC in your kernel
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build.
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config MTK_VCP_MBOX
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tristate "MediaTek VCP Mailbox Support"
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depends on ARCH_MEDIATEK || COMPILE_TEST
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help
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Say yes here to add support for the MediaTek VCP mailbox driver.
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The mailbox implementation provides access from the application
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processor to Video Companion Processor Unit.
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If unsure say N.
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config ZYNQMP_IPI_MBOX
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tristate "Xilinx ZynqMP IPI Mailbox"
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depends on ARCH_ZYNQMP && OF

drivers/mailbox/Makefile

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@@ -65,6 +65,8 @@ obj-$(CONFIG_MTK_CMDQ_MBOX) += mtk-cmdq-mailbox.o
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obj-$(CONFIG_MTK_GPUEB_MBOX) += mtk-gpueb-mailbox.o
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obj-$(CONFIG_MTK_VCP_MBOX) += mtk-vcp-mailbox.o
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obj-$(CONFIG_ZYNQMP_IPI_MBOX) += zynqmp-ipi-mailbox.o
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obj-$(CONFIG_SUN6I_MSGBOX) += sun6i-msgbox.o

drivers/mailbox/mtk-vcp-mailbox.c

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// SPDX-License-Identifier: GPL-2.0
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/*
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* Copyright (c) 2025 MediaTek Corporation. All rights reserved.
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* Author: Jjian Zhou <jjian.zhou.@mediatek.com>
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*/
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#include <linux/interrupt.h>
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#include <linux/io.h>
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#include <linux/kernel.h>
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#include <linux/mailbox_controller.h>
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#include <linux/mailbox/mtk-vcp-mailbox.h>
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#include <linux/module.h>
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#include <linux/of.h>
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#include <linux/platform_device.h>
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#include <linux/slab.h>
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struct mtk_vcp_mbox {
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struct mbox_controller mbox;
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void __iomem *base;
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struct device *dev;
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const struct mtk_vcp_mbox_cfg *cfg;
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struct mtk_ipi_info ipi_recv;
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struct mbox_chan chans;
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};
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struct mtk_vcp_mbox_cfg {
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u16 set_in;
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u16 clr_out;
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};
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static irqreturn_t mtk_vcp_mbox_irq_thread(int irq, void *data)
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{
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struct mtk_vcp_mbox *priv = data;
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/* get irq status */
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priv->ipi_recv.irq_status = readl(priv->base + priv->cfg->clr_out);
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__ioread32_copy(priv->ipi_recv.msg, priv->base,
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MTK_VCP_MBOX_SLOT_MAX_SIZE / 4);
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mbox_chan_received_data(&priv->chans, &priv->ipi_recv);
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/* clear irq status */
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writel(priv->ipi_recv.irq_status, priv->base + priv->cfg->clr_out);
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return IRQ_HANDLED;
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}
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static struct mbox_chan *mtk_vcp_mbox_xlate(struct mbox_controller *mbox,
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const struct of_phandle_args *sp)
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{
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if (sp->args_count)
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return NULL;
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return &mbox->chans[0];
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}
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static int mtk_vcp_mbox_send_data(struct mbox_chan *chan, void *data)
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{
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struct mtk_vcp_mbox *priv = chan->con_priv;
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struct mtk_ipi_info *ipi_info = data;
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u32 status;
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if (!ipi_info->msg) {
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dev_err(priv->dev, "msg buffer is NULL.\n");
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return -EINVAL;
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}
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status = readl(priv->base + priv->cfg->set_in);
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if (status & BIT(ipi_info->index)) {
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dev_warn(priv->dev, "mailbox IPI %d is busy.\n", ipi_info->id);
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return -EBUSY;
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}
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if (ipi_info->slot_ofs + ipi_info->len > MTK_VCP_MBOX_SLOT_MAX_SIZE)
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return -EINVAL;
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__iowrite32_copy(priv->base + ipi_info->slot_ofs, ipi_info->msg,
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ipi_info->len);
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writel(BIT(ipi_info->index), priv->base + priv->cfg->set_in);
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return 0;
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}
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static bool mtk_vcp_mbox_last_tx_done(struct mbox_chan *chan)
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{
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struct mtk_ipi_info *ipi_info = chan->active_req;
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struct mtk_vcp_mbox *priv = chan->con_priv;
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return !(readl(priv->base + priv->cfg->set_in) & BIT(ipi_info->index));
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}
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static const struct mbox_chan_ops mtk_vcp_mbox_chan_ops = {
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.send_data = mtk_vcp_mbox_send_data,
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.last_tx_done = mtk_vcp_mbox_last_tx_done,
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};
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static int mtk_vcp_mbox_probe(struct platform_device *pdev)
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{
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struct device *dev = &pdev->dev;
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struct mtk_vcp_mbox *priv;
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struct mbox_controller *mbox;
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int ret, irq;
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priv = devm_kzalloc(dev, sizeof(*priv), GFP_KERNEL);
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if (!priv)
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return -ENOMEM;
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priv->dev = dev;
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priv->chans.con_priv = priv;
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mbox = &priv->mbox;
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mbox->dev = dev;
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mbox->ops = &mtk_vcp_mbox_chan_ops;
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mbox->txdone_irq = false;
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mbox->txdone_poll = true;
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mbox->of_xlate = mtk_vcp_mbox_xlate;
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mbox->num_chans = 1;
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mbox->chans = &priv->chans;
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priv->ipi_recv.msg = devm_kzalloc(dev, MTK_VCP_MBOX_SLOT_MAX_SIZE,
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GFP_KERNEL);
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if (!priv->ipi_recv.msg)
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return -ENOMEM;
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priv->base = devm_platform_ioremap_resource(pdev, 0);
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if (IS_ERR(priv->base))
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return PTR_ERR(priv->base);
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priv->cfg = of_device_get_match_data(dev);
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if (!priv->cfg)
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return -EINVAL;
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platform_set_drvdata(pdev, priv);
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irq = platform_get_irq(pdev, 0);
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if (irq < 0)
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return irq;
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ret = devm_request_threaded_irq(dev, irq, NULL,
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mtk_vcp_mbox_irq_thread, IRQF_ONESHOT,
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dev_name(dev), priv);
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if (ret < 0)
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return ret;
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return devm_mbox_controller_register(dev, &priv->mbox);
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}
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static const struct mtk_vcp_mbox_cfg mt8196_cfg = {
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.set_in = 0x100,
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.clr_out = 0x10c,
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};
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static const struct of_device_id mtk_vcp_mbox_of_match[] = {
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{ .compatible = "mediatek,mt8196-vcp-mbox", .data = &mt8196_cfg },
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{},
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};
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MODULE_DEVICE_TABLE(of, mtk_vcp_mbox_of_match);
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static struct platform_driver mtk_vcp_mbox_driver = {
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.probe = mtk_vcp_mbox_probe,
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.driver = {
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.name = "mtk_vcp_mbox",
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.of_match_table = mtk_vcp_mbox_of_match,
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},
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};
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module_platform_driver(mtk_vcp_mbox_driver);
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MODULE_AUTHOR("Jjian Zhou <jjian.zhou@mediatek.com>");
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MODULE_DESCRIPTION("MTK VCP Mailbox Controller");
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MODULE_LICENSE("GPL");
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/* SPDX-License-Identifier: (GPL-2.0 OR MIT) */
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/*
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* Copyright (c) 2025 MediaTek Inc.
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*/
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#ifndef __MTK_VCP_MAILBOX_H__
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#define __MTK_VCP_MAILBOX_H__
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#define MTK_VCP_MBOX_SLOT_MAX_SIZE 0x100 /* mbox max slot size */
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/**
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* struct mtk_ipi_info - mailbox message info for mtk-vcp-mailbox
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* @msg: The share buffer between IPC and mailbox driver
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* @len: Message length
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* @id: This is for identification purposes and not actually used
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* by the mailbox hardware.
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* @index: The signal number of the mailbox message.
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* @slot_ofs: Data slot offset.
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* @irq_status: Captures incoming signals for the RX path.
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*
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* It is used between IPC with mailbox driver.
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*/
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struct mtk_ipi_info {
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void *msg;
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u32 len;
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u32 id;
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u32 index;
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u32 slot_ofs;
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u32 irq_status;
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};
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#endif

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