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XBurstLinus Walleij
XBurst
authored and
Linus Walleij
committed
pinctrl: Ingenic: Add SSI pins support for JZ4755 and JZ4760.
Add SSI pins support for the JZ4755 SoC and the JZ4760 SoC from Ingenic. Signed-off-by: 周琰杰 (Zhou Yanjie) <zhouyanjie@wanyeetech.com> Link: https://lore.kernel.org/r/1627108604-91304-3-git-send-email-zhouyanjie@wanyeetech.com Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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‎drivers/pinctrl/pinctrl-ingenic.c‎

Lines changed: 155 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -589,6 +589,18 @@ static int jz4755_uart0_data_pins[] = { 0x7c, 0x7d, };
589589
static int jz4755_uart0_hwflow_pins[] = { 0x7e, 0x7f, };
590590
static int jz4755_uart1_data_pins[] = { 0x97, 0x99, };
591591
static int jz4755_uart2_data_pins[] = { 0x9f, };
592+
static int jz4755_ssi_dt_b_pins[] = { 0x3b, };
593+
static int jz4755_ssi_dt_f_pins[] = { 0xa1, };
594+
static int jz4755_ssi_dr_b_pins[] = { 0x3c, };
595+
static int jz4755_ssi_dr_f_pins[] = { 0xa2, };
596+
static int jz4755_ssi_clk_b_pins[] = { 0x3a, };
597+
static int jz4755_ssi_clk_f_pins[] = { 0xa0, };
598+
static int jz4755_ssi_gpc_b_pins[] = { 0x3e, };
599+
static int jz4755_ssi_gpc_f_pins[] = { 0xa4, };
600+
static int jz4755_ssi_ce0_b_pins[] = { 0x3d, };
601+
static int jz4755_ssi_ce0_f_pins[] = { 0xa3, };
602+
static int jz4755_ssi_ce1_b_pins[] = { 0x3f, };
603+
static int jz4755_ssi_ce1_f_pins[] = { 0xa5, };
592604
static int jz4755_mmc0_1bit_pins[] = { 0x2f, 0x50, 0x5c, };
593605
static int jz4755_mmc0_4bit_pins[] = { 0x5d, 0x5b, 0x51, };
594606
static int jz4755_mmc1_1bit_pins[] = { 0x3a, 0x3d, 0x3c, };
@@ -630,6 +642,18 @@ static const struct group_desc jz4755_groups[] = {
630642
INGENIC_PIN_GROUP("uart0-hwflow", jz4755_uart0_hwflow, 0),
631643
INGENIC_PIN_GROUP("uart1-data", jz4755_uart1_data, 0),
632644
INGENIC_PIN_GROUP("uart2-data", jz4755_uart2_data, 1),
645+
INGENIC_PIN_GROUP("ssi-dt-b", jz4755_ssi_dt_b, 0),
646+
INGENIC_PIN_GROUP("ssi-dt-f", jz4755_ssi_dt_f, 0),
647+
INGENIC_PIN_GROUP("ssi-dr-b", jz4755_ssi_dr_b, 0),
648+
INGENIC_PIN_GROUP("ssi-dr-f", jz4755_ssi_dr_f, 0),
649+
INGENIC_PIN_GROUP("ssi-clk-b", jz4755_ssi_clk_b, 0),
650+
INGENIC_PIN_GROUP("ssi-clk-f", jz4755_ssi_clk_f, 0),
651+
INGENIC_PIN_GROUP("ssi-gpc-b", jz4755_ssi_gpc_b, 0),
652+
INGENIC_PIN_GROUP("ssi-gpc-f", jz4755_ssi_gpc_f, 0),
653+
INGENIC_PIN_GROUP("ssi-ce0-b", jz4755_ssi_ce0_b, 0),
654+
INGENIC_PIN_GROUP("ssi-ce0-f", jz4755_ssi_ce0_f, 0),
655+
INGENIC_PIN_GROUP("ssi-ce1-b", jz4755_ssi_ce1_b, 0),
656+
INGENIC_PIN_GROUP("ssi-ce1-f", jz4755_ssi_ce1_f, 0),
633657
INGENIC_PIN_GROUP_FUNCS("mmc0-1bit", jz4755_mmc0_1bit,
634658
jz4755_mmc0_1bit_funcs),
635659
INGENIC_PIN_GROUP_FUNCS("mmc0-4bit", jz4755_mmc0_4bit,
@@ -661,6 +685,14 @@ static const struct group_desc jz4755_groups[] = {
661685
static const char *jz4755_uart0_groups[] = { "uart0-data", "uart0-hwflow", };
662686
static const char *jz4755_uart1_groups[] = { "uart1-data", };
663687
static const char *jz4755_uart2_groups[] = { "uart2-data", };
688+
static const char *jz4755_ssi_groups[] = {
689+
"ssi-dt-b", "ssi-dt-f",
690+
"ssi-dr-b", "ssi-dr-f",
691+
"ssi-clk-b", "ssi-clk-f",
692+
"ssi-gpc-b", "ssi-gpc-f",
693+
"ssi-ce0-b", "ssi-ce0-f",
694+
"ssi-ce1-b", "ssi-ce1-f",
695+
};
664696
static const char *jz4755_mmc0_groups[] = { "mmc0-1bit", "mmc0-4bit", };
665697
static const char *jz4755_mmc1_groups[] = { "mmc0-1bit", "mmc0-4bit", };
666698
static const char *jz4755_i2c_groups[] = { "i2c-data", };
@@ -683,6 +715,7 @@ static const struct function_desc jz4755_functions[] = {
683715
{ "uart0", jz4755_uart0_groups, ARRAY_SIZE(jz4755_uart0_groups), },
684716
{ "uart1", jz4755_uart1_groups, ARRAY_SIZE(jz4755_uart1_groups), },
685717
{ "uart2", jz4755_uart2_groups, ARRAY_SIZE(jz4755_uart2_groups), },
718+
{ "ssi", jz4755_ssi_groups, ARRAY_SIZE(jz4755_ssi_groups), },
686719
{ "mmc0", jz4755_mmc0_groups, ARRAY_SIZE(jz4755_mmc0_groups), },
687720
{ "mmc1", jz4755_mmc1_groups, ARRAY_SIZE(jz4755_mmc1_groups), },
688721
{ "i2c", jz4755_i2c_groups, ARRAY_SIZE(jz4755_i2c_groups), },
@@ -725,6 +758,58 @@ static int jz4760_uart2_data_pins[] = { 0x5c, 0x5e, };
725758
static int jz4760_uart2_hwflow_pins[] = { 0x5d, 0x5f, };
726759
static int jz4760_uart3_data_pins[] = { 0x6c, 0x85, };
727760
static int jz4760_uart3_hwflow_pins[] = { 0x88, 0x89, };
761+
static int jz4760_ssi0_dt_a_pins[] = { 0x15, };
762+
static int jz4760_ssi0_dt_b_pins[] = { 0x35, };
763+
static int jz4760_ssi0_dt_d_pins[] = { 0x75, };
764+
static int jz4760_ssi0_dt_e_pins[] = { 0x91, };
765+
static int jz4760_ssi0_dr_a_pins[] = { 0x14, };
766+
static int jz4760_ssi0_dr_b_pins[] = { 0x34, };
767+
static int jz4760_ssi0_dr_d_pins[] = { 0x74, };
768+
static int jz4760_ssi0_dr_e_pins[] = { 0x8e, };
769+
static int jz4760_ssi0_clk_a_pins[] = { 0x12, };
770+
static int jz4760_ssi0_clk_b_pins[] = { 0x3c, };
771+
static int jz4760_ssi0_clk_d_pins[] = { 0x78, };
772+
static int jz4760_ssi0_clk_e_pins[] = { 0x8f, };
773+
static int jz4760_ssi0_gpc_b_pins[] = { 0x3e, };
774+
static int jz4760_ssi0_gpc_d_pins[] = { 0x76, };
775+
static int jz4760_ssi0_gpc_e_pins[] = { 0x93, };
776+
static int jz4760_ssi0_ce0_a_pins[] = { 0x13, };
777+
static int jz4760_ssi0_ce0_b_pins[] = { 0x3d, };
778+
static int jz4760_ssi0_ce0_d_pins[] = { 0x79, };
779+
static int jz4760_ssi0_ce0_e_pins[] = { 0x90, };
780+
static int jz4760_ssi0_ce1_b_pins[] = { 0x3f, };
781+
static int jz4760_ssi0_ce1_d_pins[] = { 0x77, };
782+
static int jz4760_ssi0_ce1_e_pins[] = { 0x92, };
783+
static int jz4760_ssi1_dt_b_9_pins[] = { 0x29, };
784+
static int jz4760_ssi1_dt_b_21_pins[] = { 0x35, };
785+
static int jz4760_ssi1_dt_d_12_pins[] = { 0x6c, };
786+
static int jz4760_ssi1_dt_d_21_pins[] = { 0x75, };
787+
static int jz4760_ssi1_dt_e_pins[] = { 0x91, };
788+
static int jz4760_ssi1_dt_f_pins[] = { 0xa3, };
789+
static int jz4760_ssi1_dr_b_6_pins[] = { 0x26, };
790+
static int jz4760_ssi1_dr_b_20_pins[] = { 0x34, };
791+
static int jz4760_ssi1_dr_d_13_pins[] = { 0x6d, };
792+
static int jz4760_ssi1_dr_d_20_pins[] = { 0x74, };
793+
static int jz4760_ssi1_dr_e_pins[] = { 0x8e, };
794+
static int jz4760_ssi1_dr_f_pins[] = { 0xa0, };
795+
static int jz4760_ssi1_clk_b_7_pins[] = { 0x27, };
796+
static int jz4760_ssi1_clk_b_28_pins[] = { 0x3c, };
797+
static int jz4760_ssi1_clk_d_pins[] = { 0x78, };
798+
static int jz4760_ssi1_clk_e_7_pins[] = { 0x87, };
799+
static int jz4760_ssi1_clk_e_15_pins[] = { 0x8f, };
800+
static int jz4760_ssi1_clk_f_pins[] = { 0xa2, };
801+
static int jz4760_ssi1_gpc_b_pins[] = { 0x3e, };
802+
static int jz4760_ssi1_gpc_d_pins[] = { 0x76, };
803+
static int jz4760_ssi1_gpc_e_pins[] = { 0x93, };
804+
static int jz4760_ssi1_ce0_b_8_pins[] = { 0x28, };
805+
static int jz4760_ssi1_ce0_b_29_pins[] = { 0x3d, };
806+
static int jz4760_ssi1_ce0_d_pins[] = { 0x79, };
807+
static int jz4760_ssi1_ce0_e_6_pins[] = { 0x86, };
808+
static int jz4760_ssi1_ce0_e_16_pins[] = { 0x90, };
809+
static int jz4760_ssi1_ce0_f_pins[] = { 0xa1, };
810+
static int jz4760_ssi1_ce1_b_pins[] = { 0x3f, };
811+
static int jz4760_ssi1_ce1_d_pins[] = { 0x77, };
812+
static int jz4760_ssi1_ce1_e_pins[] = { 0x92, };
728813
static int jz4760_mmc0_1bit_a_pins[] = { 0x12, 0x13, 0x14, };
729814
static int jz4760_mmc0_4bit_a_pins[] = { 0x15, 0x16, 0x17, };
730815
static int jz4760_mmc0_1bit_e_pins[] = { 0x9c, 0x9d, 0x94, };
@@ -801,6 +886,58 @@ static const struct group_desc jz4760_groups[] = {
801886
INGENIC_PIN_GROUP_FUNCS("uart3-data", jz4760_uart3_data,
802887
jz4760_uart3_data_funcs),
803888
INGENIC_PIN_GROUP("uart3-hwflow", jz4760_uart3_hwflow, 0),
889+
INGENIC_PIN_GROUP("ssi0-dt-a", jz4760_ssi0_dt_a, 2),
890+
INGENIC_PIN_GROUP("ssi0-dt-b", jz4760_ssi0_dt_b, 1),
891+
INGENIC_PIN_GROUP("ssi0-dt-d", jz4760_ssi0_dt_d, 1),
892+
INGENIC_PIN_GROUP("ssi0-dt-e", jz4760_ssi0_dt_e, 0),
893+
INGENIC_PIN_GROUP("ssi0-dr-a", jz4760_ssi0_dr_a, 1),
894+
INGENIC_PIN_GROUP("ssi0-dr-b", jz4760_ssi0_dr_b, 1),
895+
INGENIC_PIN_GROUP("ssi0-dr-d", jz4760_ssi0_dr_d, 1),
896+
INGENIC_PIN_GROUP("ssi0-dr-e", jz4760_ssi0_dr_e, 0),
897+
INGENIC_PIN_GROUP("ssi0-clk-a", jz4760_ssi0_clk_a, 2),
898+
INGENIC_PIN_GROUP("ssi0-clk-b", jz4760_ssi0_clk_b, 1),
899+
INGENIC_PIN_GROUP("ssi0-clk-d", jz4760_ssi0_clk_d, 1),
900+
INGENIC_PIN_GROUP("ssi0-clk-e", jz4760_ssi0_clk_e, 0),
901+
INGENIC_PIN_GROUP("ssi0-gpc-b", jz4760_ssi0_gpc_b, 1),
902+
INGENIC_PIN_GROUP("ssi0-gpc-d", jz4760_ssi0_gpc_d, 1),
903+
INGENIC_PIN_GROUP("ssi0-gpc-e", jz4760_ssi0_gpc_e, 0),
904+
INGENIC_PIN_GROUP("ssi0-ce0-a", jz4760_ssi0_ce0_a, 2),
905+
INGENIC_PIN_GROUP("ssi0-ce0-b", jz4760_ssi0_ce0_b, 1),
906+
INGENIC_PIN_GROUP("ssi0-ce0-d", jz4760_ssi0_ce0_d, 1),
907+
INGENIC_PIN_GROUP("ssi0-ce0-e", jz4760_ssi0_ce0_e, 0),
908+
INGENIC_PIN_GROUP("ssi0-ce1-b", jz4760_ssi0_ce1_b, 1),
909+
INGENIC_PIN_GROUP("ssi0-ce1-d", jz4760_ssi0_ce1_d, 1),
910+
INGENIC_PIN_GROUP("ssi0-ce1-e", jz4760_ssi0_ce1_e, 0),
911+
INGENIC_PIN_GROUP("ssi1-dt-b-9", jz4760_ssi1_dt_b_9, 2),
912+
INGENIC_PIN_GROUP("ssi1-dt-b-21", jz4760_ssi1_dt_b_21, 2),
913+
INGENIC_PIN_GROUP("ssi1-dt-d-12", jz4760_ssi1_dt_d_12, 2),
914+
INGENIC_PIN_GROUP("ssi1-dt-d-21", jz4760_ssi1_dt_d_21, 2),
915+
INGENIC_PIN_GROUP("ssi1-dt-e", jz4760_ssi1_dt_e, 1),
916+
INGENIC_PIN_GROUP("ssi1-dt-f", jz4760_ssi1_dt_f, 2),
917+
INGENIC_PIN_GROUP("ssi1-dr-b-6", jz4760_ssi1_dr_b_6, 2),
918+
INGENIC_PIN_GROUP("ssi1-dr-b-20", jz4760_ssi1_dr_b_20, 2),
919+
INGENIC_PIN_GROUP("ssi1-dr-d-13", jz4760_ssi1_dr_d_13, 2),
920+
INGENIC_PIN_GROUP("ssi1-dr-d-20", jz4760_ssi1_dr_d_20, 2),
921+
INGENIC_PIN_GROUP("ssi1-dr-e", jz4760_ssi1_dr_e, 1),
922+
INGENIC_PIN_GROUP("ssi1-dr-f", jz4760_ssi1_dr_f, 2),
923+
INGENIC_PIN_GROUP("ssi1-clk-b-7", jz4760_ssi1_clk_b_7, 2),
924+
INGENIC_PIN_GROUP("ssi1-clk-b-28", jz4760_ssi1_clk_b_28, 2),
925+
INGENIC_PIN_GROUP("ssi1-clk-d", jz4760_ssi1_clk_d, 2),
926+
INGENIC_PIN_GROUP("ssi1-clk-e-7", jz4760_ssi1_clk_e_7, 2),
927+
INGENIC_PIN_GROUP("ssi1-clk-e-15", jz4760_ssi1_clk_e_15, 1),
928+
INGENIC_PIN_GROUP("ssi1-clk-f", jz4760_ssi1_clk_f, 2),
929+
INGENIC_PIN_GROUP("ssi1-gpc-b", jz4760_ssi1_gpc_b, 2),
930+
INGENIC_PIN_GROUP("ssi1-gpc-d", jz4760_ssi1_gpc_d, 2),
931+
INGENIC_PIN_GROUP("ssi1-gpc-e", jz4760_ssi1_gpc_e, 1),
932+
INGENIC_PIN_GROUP("ssi1-ce0-b-8", jz4760_ssi1_ce0_b_8, 2),
933+
INGENIC_PIN_GROUP("ssi1-ce0-b-29", jz4760_ssi1_ce0_b_29, 2),
934+
INGENIC_PIN_GROUP("ssi1-ce0-d", jz4760_ssi1_ce0_d, 2),
935+
INGENIC_PIN_GROUP("ssi1-ce0-e-6", jz4760_ssi1_ce0_e_6, 2),
936+
INGENIC_PIN_GROUP("ssi1-ce0-e-16", jz4760_ssi1_ce0_e_16, 1),
937+
INGENIC_PIN_GROUP("ssi1-ce0-f", jz4760_ssi1_ce0_f, 2),
938+
INGENIC_PIN_GROUP("ssi1-ce1-b", jz4760_ssi1_ce1_b, 2),
939+
INGENIC_PIN_GROUP("ssi1-ce1-d", jz4760_ssi1_ce1_d, 2),
940+
INGENIC_PIN_GROUP("ssi1-ce1-e", jz4760_ssi1_ce1_e, 1),
804941
INGENIC_PIN_GROUP_FUNCS("mmc0-1bit-a", jz4760_mmc0_1bit_a,
805942
jz4760_mmc0_1bit_a_funcs),
806943
INGENIC_PIN_GROUP("mmc0-4bit-a", jz4760_mmc0_4bit_a, 1),
@@ -854,6 +991,22 @@ static const char *jz4760_uart0_groups[] = { "uart0-data", "uart0-hwflow", };
854991
static const char *jz4760_uart1_groups[] = { "uart1-data", "uart1-hwflow", };
855992
static const char *jz4760_uart2_groups[] = { "uart2-data", "uart2-hwflow", };
856993
static const char *jz4760_uart3_groups[] = { "uart3-data", "uart3-hwflow", };
994+
static const char *jz4760_ssi0_groups[] = {
995+
"ssi0-dt-a", "ssi0-dt-b", "ssi0-dt-d", "ssi0-dt-e",
996+
"ssi0-dr-a", "ssi0-dr-b", "ssi0-dr-d", "ssi0-dr-e",
997+
"ssi0-clk-a", "ssi0-clk-b", "ssi0-clk-d", "ssi0-clk-e",
998+
"ssi0-gpc-b", "ssi0-gpc-d", "ssi0-gpc-e",
999+
"ssi0-ce0-a", "ssi0-ce0-b", "ssi0-ce0-d", "ssi0-ce0-e",
1000+
"ssi0-ce1-b", "ssi0-ce1-d", "ssi0-ce1-e",
1001+
};
1002+
static const char *jz4760_ssi1_groups[] = {
1003+
"ssi1-dt-b-9", "ssi1-dt-b-21", "ssi1-dt-d-12", "ssi1-dt-d-21", "ssi1-dt-e", "ssi1-dt-f",
1004+
"ssi1-dr-b-6", "ssi1-dr-b-20", "ssi1-dr-d-13", "ssi1-dr-d-20", "ssi1-dr-e", "ssi1-dr-f",
1005+
"ssi1-clk-b-7", "ssi1-clk-b-28", "ssi1-clk-d", "ssi1-clk-e-7", "ssi1-clk-e-15", "ssi1-clk-f",
1006+
"ssi1-gpc-b", "ssi1-gpc-d", "ssi1-gpc-e",
1007+
"ssi1-ce0-b-8", "ssi1-ce0-b-29", "ssi1-ce0-d", "ssi1-ce0-e-6", "ssi1-ce0-e-16", "ssi1-ce0-f",
1008+
"ssi1-ce1-b", "ssi1-ce1-d", "ssi1-ce1-e",
1009+
};
8571010
static const char *jz4760_mmc0_groups[] = {
8581011
"mmc0-1bit-a", "mmc0-4bit-a",
8591012
"mmc0-1bit-e", "mmc0-4bit-e", "mmc0-8bit-e",
@@ -898,6 +1051,8 @@ static const struct function_desc jz4760_functions[] = {
8981051
{ "uart1", jz4760_uart1_groups, ARRAY_SIZE(jz4760_uart1_groups), },
8991052
{ "uart2", jz4760_uart2_groups, ARRAY_SIZE(jz4760_uart2_groups), },
9001053
{ "uart3", jz4760_uart3_groups, ARRAY_SIZE(jz4760_uart3_groups), },
1054+
{ "ssi0", jz4760_ssi0_groups, ARRAY_SIZE(jz4760_ssi0_groups), },
1055+
{ "ssi1", jz4760_ssi1_groups, ARRAY_SIZE(jz4760_ssi1_groups), },
9011056
{ "mmc0", jz4760_mmc0_groups, ARRAY_SIZE(jz4760_mmc0_groups), },
9021057
{ "mmc1", jz4760_mmc1_groups, ARRAY_SIZE(jz4760_mmc1_groups), },
9031058
{ "mmc2", jz4760_mmc2_groups, ARRAY_SIZE(jz4760_mmc2_groups), },

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