@@ -754,15 +754,17 @@ int amdgpu_vm_flush(struct amdgpu_ring *ring, struct amdgpu_job *job,
754754 bool need_pipe_sync )
755755{
756756 struct amdgpu_device * adev = ring -> adev ;
757+ struct amdgpu_isolation * isolation = & adev -> isolation [ring -> xcp_id ];
757758 unsigned vmhub = ring -> vm_hub ;
758759 struct amdgpu_vmid_mgr * id_mgr = & adev -> vm_manager .id_mgr [vmhub ];
759760 struct amdgpu_vmid * id = & id_mgr -> ids [job -> vmid ];
760761 bool spm_update_needed = job -> spm_update_needed ;
761762 bool gds_switch_needed = ring -> funcs -> emit_gds_switch &&
762763 job -> gds_switch_needed ;
763764 bool vm_flush_needed = job -> vm_needs_flush ;
764- struct dma_fence * fence = NULL ;
765+ bool cleaner_shader_needed = false ;
765766 bool pasid_mapping_needed = false;
767+ struct dma_fence * fence = NULL ;
766768 unsigned int patch ;
767769 int r ;
768770
@@ -785,8 +787,12 @@ int amdgpu_vm_flush(struct amdgpu_ring *ring, struct amdgpu_job *job,
785787 pasid_mapping_needed &= adev -> gmc .gmc_funcs -> emit_pasid_mapping &&
786788 ring -> funcs -> emit_wreg ;
787789
790+ cleaner_shader_needed = adev -> gfx .enable_cleaner_shader &&
791+ ring -> funcs -> emit_cleaner_shader && job -> base .s_fence &&
792+ & job -> base .s_fence -> scheduled == isolation -> spearhead ;
793+
788794 if (!vm_flush_needed && !gds_switch_needed && !need_pipe_sync &&
789- !( job -> enforce_isolation && ! job -> vmid ) )
795+ !cleaner_shader_needed )
790796 return 0 ;
791797
792798 amdgpu_ring_ib_begin (ring );
@@ -797,9 +803,7 @@ int amdgpu_vm_flush(struct amdgpu_ring *ring, struct amdgpu_job *job,
797803 if (need_pipe_sync )
798804 amdgpu_ring_emit_pipeline_sync (ring );
799805
800- if (adev -> gfx .enable_cleaner_shader &&
801- ring -> funcs -> emit_cleaner_shader &&
802- job -> enforce_isolation )
806+ if (cleaner_shader_needed )
803807 ring -> funcs -> emit_cleaner_shader (ring );
804808
805809 if (vm_flush_needed ) {
@@ -821,7 +825,7 @@ int amdgpu_vm_flush(struct amdgpu_ring *ring, struct amdgpu_job *job,
821825 job -> oa_size );
822826 }
823827
824- if (vm_flush_needed || pasid_mapping_needed ) {
828+ if (vm_flush_needed || pasid_mapping_needed || cleaner_shader_needed ) {
825829 r = amdgpu_fence_emit (ring , & fence , NULL , 0 );
826830 if (r )
827831 return r ;
@@ -843,6 +847,17 @@ int amdgpu_vm_flush(struct amdgpu_ring *ring, struct amdgpu_job *job,
843847 id -> pasid_mapping = dma_fence_get (fence );
844848 mutex_unlock (& id_mgr -> lock );
845849 }
850+
851+ /*
852+ * Make sure that all other submissions wait for the cleaner shader to
853+ * finish before we push them to the HW.
854+ */
855+ if (cleaner_shader_needed ) {
856+ mutex_lock (& adev -> enforce_isolation_mutex );
857+ dma_fence_put (isolation -> spearhead );
858+ isolation -> spearhead = dma_fence_get (fence );
859+ mutex_unlock (& adev -> enforce_isolation_mutex );
860+ }
846861 dma_fence_put (fence );
847862
848863 amdgpu_ring_patch_cond_exec (ring , patch );
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