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Michal Simekwsakernel
authored andcommitted
i2c: xiic: Fix coding style issues
Most of these stuff are reported by checkpatch. But fixes are: - Incorrect indetation - Missing blank line after variable declaration - Additional () - Missing spaces around + - Missing parenthesis when if has them - Newlines - Remove MODULE_ALIAS - none is really using it Signed-off-by: Michal Simek <michal.simek@xilinx.com> Signed-off-by: Shubhrajyoti Datta <shubhrajyoti.datta@xilinx.com> Signed-off-by: Wolfram Sang <wsa@kernel.org>
1 parent 8fa9c93 commit b822039

1 file changed

Lines changed: 20 additions & 17 deletions

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drivers/i2c/busses/i2c-xiic.c

Lines changed: 20 additions & 17 deletions
Original file line numberDiff line numberDiff line change
@@ -78,24 +78,23 @@ struct xiic_i2c {
7878
bool singlemaster;
7979
};
8080

81-
8281
#define XIIC_MSB_OFFSET 0
83-
#define XIIC_REG_OFFSET (0x100+XIIC_MSB_OFFSET)
82+
#define XIIC_REG_OFFSET (0x100 + XIIC_MSB_OFFSET)
8483

8584
/*
8685
* Register offsets in bytes from RegisterBase. Three is added to the
8786
* base offset to access LSB (IBM style) of the word
8887
*/
89-
#define XIIC_CR_REG_OFFSET (0x00+XIIC_REG_OFFSET) /* Control Register */
90-
#define XIIC_SR_REG_OFFSET (0x04+XIIC_REG_OFFSET) /* Status Register */
91-
#define XIIC_DTR_REG_OFFSET (0x08+XIIC_REG_OFFSET) /* Data Tx Register */
92-
#define XIIC_DRR_REG_OFFSET (0x0C+XIIC_REG_OFFSET) /* Data Rx Register */
93-
#define XIIC_ADR_REG_OFFSET (0x10+XIIC_REG_OFFSET) /* Address Register */
94-
#define XIIC_TFO_REG_OFFSET (0x14+XIIC_REG_OFFSET) /* Tx FIFO Occupancy */
95-
#define XIIC_RFO_REG_OFFSET (0x18+XIIC_REG_OFFSET) /* Rx FIFO Occupancy */
96-
#define XIIC_TBA_REG_OFFSET (0x1C+XIIC_REG_OFFSET) /* 10 Bit Address reg */
97-
#define XIIC_RFD_REG_OFFSET (0x20+XIIC_REG_OFFSET) /* Rx FIFO Depth reg */
98-
#define XIIC_GPO_REG_OFFSET (0x24+XIIC_REG_OFFSET) /* Output Register */
88+
#define XIIC_CR_REG_OFFSET (0x00 + XIIC_REG_OFFSET) /* Control Register */
89+
#define XIIC_SR_REG_OFFSET (0x04 + XIIC_REG_OFFSET) /* Status Register */
90+
#define XIIC_DTR_REG_OFFSET (0x08 + XIIC_REG_OFFSET) /* Data Tx Register */
91+
#define XIIC_DRR_REG_OFFSET (0x0C + XIIC_REG_OFFSET) /* Data Rx Register */
92+
#define XIIC_ADR_REG_OFFSET (0x10 + XIIC_REG_OFFSET) /* Address Register */
93+
#define XIIC_TFO_REG_OFFSET (0x14 + XIIC_REG_OFFSET) /* Tx FIFO Occupancy */
94+
#define XIIC_RFO_REG_OFFSET (0x18 + XIIC_REG_OFFSET) /* Rx FIFO Occupancy */
95+
#define XIIC_TBA_REG_OFFSET (0x1C + XIIC_REG_OFFSET) /* 10 Bit Address reg */
96+
#define XIIC_RFD_REG_OFFSET (0x20 + XIIC_REG_OFFSET) /* Rx FIFO Depth reg */
97+
#define XIIC_GPO_REG_OFFSET (0x24 + XIIC_REG_OFFSET) /* Output Register */
9998

10099
/* Control Register masks */
101100
#define XIIC_CR_ENABLE_DEVICE_MASK 0x01 /* Device enable = 1 */
@@ -233,18 +232,21 @@ static inline int xiic_getreg32(struct xiic_i2c *i2c, int reg)
233232
static inline void xiic_irq_dis(struct xiic_i2c *i2c, u32 mask)
234233
{
235234
u32 ier = xiic_getreg32(i2c, XIIC_IIER_OFFSET);
235+
236236
xiic_setreg32(i2c, XIIC_IIER_OFFSET, ier & ~mask);
237237
}
238238

239239
static inline void xiic_irq_en(struct xiic_i2c *i2c, u32 mask)
240240
{
241241
u32 ier = xiic_getreg32(i2c, XIIC_IIER_OFFSET);
242+
242243
xiic_setreg32(i2c, XIIC_IIER_OFFSET, ier | mask);
243244
}
244245

245246
static inline void xiic_irq_clr(struct xiic_i2c *i2c, u32 mask)
246247
{
247248
u32 isr = xiic_getreg32(i2c, XIIC_IISR_OFFSET);
249+
248250
xiic_setreg32(i2c, XIIC_IISR_OFFSET, isr & mask);
249251
}
250252

@@ -355,7 +357,8 @@ static void xiic_fill_tx_fifo(struct xiic_i2c *i2c)
355357

356358
while (len--) {
357359
u16 data = i2c->tx_msg->buf[i2c->tx_pos++];
358-
if ((xiic_tx_space(i2c) == 0) && (i2c->nmsgs == 1)) {
360+
361+
if (!xiic_tx_space(i2c) && i2c->nmsgs == 1) {
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/* last message in transfer -> STOP */
360363
data |= XIIC_TX_DYN_STOP_MASK;
361364
dev_dbg(i2c->adap.dev.parent, "%s TX STOP\n", __func__);
@@ -402,8 +405,8 @@ static irqreturn_t xiic_process(int irq, void *dev_id)
402405

403406
/* Service requesting interrupt */
404407
if ((pend & XIIC_INTR_ARB_LOST_MASK) ||
405-
((pend & XIIC_INTR_TX_ERROR_MASK) &&
406-
!(pend & XIIC_INTR_RX_FULL_MASK))) {
408+
((pend & XIIC_INTR_TX_ERROR_MASK) &&
409+
!(pend & XIIC_INTR_RX_FULL_MASK))) {
407410
/* bus arbritration lost, or...
408411
* Transmit error _OR_ RX completed
409412
* if this happens when RX_FULL is not set
@@ -641,6 +644,7 @@ static void xiic_start_send(struct xiic_i2c *i2c)
641644
static void __xiic_start_xfer(struct xiic_i2c *i2c)
642645
{
643646
int fifo_space = xiic_tx_fifo_space(i2c);
647+
644648
dev_dbg(i2c->adap.dev.parent, "%s entry, msg: %p, fifos space: %d\n",
645649
__func__, i2c->tx_msg, fifo_space);
646650

@@ -742,7 +746,6 @@ static const struct i2c_adapter xiic_adapter = {
742746
.quirks = &xiic_quirks,
743747
};
744748

745-
746749
static int xiic_i2c_probe(struct platform_device *pdev)
747750
{
748751
struct xiic_i2c *i2c;
@@ -902,6 +905,7 @@ static const struct dev_pm_ops xiic_dev_pm_ops = {
902905
SET_RUNTIME_PM_OPS(xiic_i2c_runtime_suspend,
903906
xiic_i2c_runtime_resume, NULL)
904907
};
908+
905909
static struct platform_driver xiic_i2c_driver = {
906910
.probe = xiic_i2c_probe,
907911
.remove = xiic_i2c_remove,
@@ -917,4 +921,3 @@ module_platform_driver(xiic_i2c_driver);
917921
MODULE_AUTHOR("info@mocean-labs.com");
918922
MODULE_DESCRIPTION("Xilinx I2C bus driver");
919923
MODULE_LICENSE("GPL v2");
920-
MODULE_ALIAS("platform:"DRIVER_NAME);

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