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28 | 28 | #define TGL_H_GPI_IS 0x100 |
29 | 29 | #define TGL_H_GPI_IE 0x120 |
30 | 30 |
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31 | | -#define TGL_GPP(r, s, e, g) \ |
32 | | - { \ |
33 | | - .reg_num = (r), \ |
34 | | - .base = (s), \ |
35 | | - .size = ((e) - (s) + 1), \ |
36 | | - .gpio_base = (g), \ |
37 | | - } |
38 | | - |
39 | 31 | #define TGL_LP_COMMUNITY(b, s, e, g) \ |
40 | 32 | INTEL_COMMUNITY_GPPS(b, s, e, g, TGL_LP) |
41 | 33 |
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@@ -339,30 +331,30 @@ static const struct pinctrl_pin_desc tgllp_pins[] = { |
339 | 331 | }; |
340 | 332 |
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341 | 333 | static const struct intel_padgroup tgllp_community0_gpps[] = { |
342 | | - TGL_GPP(0, 0, 25, 0), /* GPP_B */ |
343 | | - TGL_GPP(1, 26, 41, 32), /* GPP_T */ |
344 | | - TGL_GPP(2, 42, 66, 64), /* GPP_A */ |
| 334 | + INTEL_GPP(0, 0, 25, 0), /* GPP_B */ |
| 335 | + INTEL_GPP(1, 26, 41, 32), /* GPP_T */ |
| 336 | + INTEL_GPP(2, 42, 66, 64), /* GPP_A */ |
345 | 337 | }; |
346 | 338 |
|
347 | 339 | static const struct intel_padgroup tgllp_community1_gpps[] = { |
348 | | - TGL_GPP(0, 67, 74, 96), /* GPP_S */ |
349 | | - TGL_GPP(1, 75, 98, 128), /* GPP_H */ |
350 | | - TGL_GPP(2, 99, 119, 160), /* GPP_D */ |
351 | | - TGL_GPP(3, 120, 143, 192), /* GPP_U */ |
352 | | - TGL_GPP(4, 144, 170, 224), /* vGPIO */ |
| 340 | + INTEL_GPP(0, 67, 74, 96), /* GPP_S */ |
| 341 | + INTEL_GPP(1, 75, 98, 128), /* GPP_H */ |
| 342 | + INTEL_GPP(2, 99, 119, 160), /* GPP_D */ |
| 343 | + INTEL_GPP(3, 120, 143, 192), /* GPP_U */ |
| 344 | + INTEL_GPP(4, 144, 170, 224), /* vGPIO */ |
353 | 345 | }; |
354 | 346 |
|
355 | 347 | static const struct intel_padgroup tgllp_community4_gpps[] = { |
356 | | - TGL_GPP(0, 171, 194, 256), /* GPP_C */ |
357 | | - TGL_GPP(1, 195, 219, 288), /* GPP_F */ |
358 | | - TGL_GPP(2, 220, 225, INTEL_GPIO_BASE_NOMAP), /* HVCMOS */ |
359 | | - TGL_GPP(3, 226, 250, 320), /* GPP_E */ |
360 | | - TGL_GPP(4, 251, 259, INTEL_GPIO_BASE_NOMAP), /* JTAG */ |
| 348 | + INTEL_GPP(0, 171, 194, 256), /* GPP_C */ |
| 349 | + INTEL_GPP(1, 195, 219, 288), /* GPP_F */ |
| 350 | + INTEL_GPP(2, 220, 225, INTEL_GPIO_BASE_NOMAP), /* HVCMOS */ |
| 351 | + INTEL_GPP(3, 226, 250, 320), /* GPP_E */ |
| 352 | + INTEL_GPP(4, 251, 259, INTEL_GPIO_BASE_NOMAP), /* JTAG */ |
361 | 353 | }; |
362 | 354 |
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363 | 355 | static const struct intel_padgroup tgllp_community5_gpps[] = { |
364 | | - TGL_GPP(0, 260, 267, 352), /* GPP_R */ |
365 | | - TGL_GPP(1, 268, 276, INTEL_GPIO_BASE_NOMAP), /* SPI */ |
| 356 | + INTEL_GPP(0, 260, 267, 352), /* GPP_R */ |
| 357 | + INTEL_GPP(1, 268, 276, INTEL_GPIO_BASE_NOMAP), /* SPI */ |
366 | 358 | }; |
367 | 359 |
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368 | 360 | static const struct intel_community tgllp_communities[] = { |
@@ -691,34 +683,34 @@ static const struct pinctrl_pin_desc tglh_pins[] = { |
691 | 683 | }; |
692 | 684 |
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693 | 685 | static const struct intel_padgroup tglh_community0_gpps[] = { |
694 | | - TGL_GPP(0, 0, 24, 0), /* GPP_A */ |
695 | | - TGL_GPP(1, 25, 44, 32), /* GPP_R */ |
696 | | - TGL_GPP(2, 45, 70, 64), /* GPP_B */ |
697 | | - TGL_GPP(3, 71, 78, 96), /* vGPIO_0 */ |
| 686 | + INTEL_GPP(0, 0, 24, 0), /* GPP_A */ |
| 687 | + INTEL_GPP(1, 25, 44, 32), /* GPP_R */ |
| 688 | + INTEL_GPP(2, 45, 70, 64), /* GPP_B */ |
| 689 | + INTEL_GPP(3, 71, 78, 96), /* vGPIO_0 */ |
698 | 690 | }; |
699 | 691 |
|
700 | 692 | static const struct intel_padgroup tglh_community1_gpps[] = { |
701 | | - TGL_GPP(0, 79, 104, 128), /* GPP_D */ |
702 | | - TGL_GPP(1, 105, 128, 160), /* GPP_C */ |
703 | | - TGL_GPP(2, 129, 136, 192), /* GPP_S */ |
704 | | - TGL_GPP(3, 137, 153, 224), /* GPP_G */ |
705 | | - TGL_GPP(4, 154, 180, 256), /* vGPIO */ |
| 693 | + INTEL_GPP(0, 79, 104, 128), /* GPP_D */ |
| 694 | + INTEL_GPP(1, 105, 128, 160), /* GPP_C */ |
| 695 | + INTEL_GPP(2, 129, 136, 192), /* GPP_S */ |
| 696 | + INTEL_GPP(3, 137, 153, 224), /* GPP_G */ |
| 697 | + INTEL_GPP(4, 154, 180, 256), /* vGPIO */ |
706 | 698 | }; |
707 | 699 |
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708 | 700 | static const struct intel_padgroup tglh_community3_gpps[] = { |
709 | | - TGL_GPP(0, 181, 193, 288), /* GPP_E */ |
710 | | - TGL_GPP(1, 194, 217, 320), /* GPP_F */ |
| 701 | + INTEL_GPP(0, 181, 193, 288), /* GPP_E */ |
| 702 | + INTEL_GPP(1, 194, 217, 320), /* GPP_F */ |
711 | 703 | }; |
712 | 704 |
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713 | 705 | static const struct intel_padgroup tglh_community4_gpps[] = { |
714 | | - TGL_GPP(0, 218, 241, 352), /* GPP_H */ |
715 | | - TGL_GPP(1, 242, 251, 384), /* GPP_J */ |
716 | | - TGL_GPP(2, 252, 266, 416), /* GPP_K */ |
| 706 | + INTEL_GPP(0, 218, 241, 352), /* GPP_H */ |
| 707 | + INTEL_GPP(1, 242, 251, 384), /* GPP_J */ |
| 708 | + INTEL_GPP(2, 252, 266, 416), /* GPP_K */ |
717 | 709 | }; |
718 | 710 |
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719 | 711 | static const struct intel_padgroup tglh_community5_gpps[] = { |
720 | | - TGL_GPP(0, 267, 281, 448), /* GPP_I */ |
721 | | - TGL_GPP(1, 282, 290, INTEL_GPIO_BASE_NOMAP), /* JTAG */ |
| 712 | + INTEL_GPP(0, 267, 281, 448), /* GPP_I */ |
| 713 | + INTEL_GPP(1, 282, 290, INTEL_GPIO_BASE_NOMAP), /* JTAG */ |
722 | 714 | }; |
723 | 715 |
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724 | 716 | static const struct intel_community tglh_communities[] = { |
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