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Merge tag 'icc-6.2-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/djakov/icc into char-misc-next
Georgi writes: interconnect changes for 6.2 These are the interconnect changes for the 6.2-rc1 merge window consisting of new drivers to enable both L3 and DDR scaling on sc8280xp platforms. There are also a few miscellaneous fixes. New osm-l3 driver: - interconnect: qcom: osm-l3: Use platform-independent node ids - interconnect: qcom: osm-l3: Squash common descriptors - interconnect: qcom: osm-l3: Add per-core EPSS L3 support - interconnect: qcom: osm-l3: Simplify osm_l3_set() - dt-bindings: interconnect: Add sm8350, sc8280xp and generic OSM L3 compatibles - dt-bindings: interconnect: qcom,msm8998-bwmon: Add sc8280xp bwmon instances Fixes: - interconnect: qcom: icc-rpm: Remove redundant dev_err call - interconnect: qcom: sc7180: fix dropped const of qcom_icc_bcm - interconnect: qcom: sc7180: drop double space - interconnect: qcom: sc8180x: constify pointer to qcom_icc_node Signed-off-by: Georgi Djakov <djakov@kernel.org> * tag 'icc-6.2-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/djakov/icc: interconnect: qcom: sc8180x: constify pointer to qcom_icc_node interconnect: qcom: sc7180: drop double space interconnect: qcom: sc7180: fix dropped const of qcom_icc_bcm interconnect: qcom: icc-rpm: Remove redundant dev_err call dt-bindings: interconnect: qcom,msm8998-bwmon: Add sc8280xp bwmon instances dt-bindings: interconnect: Add sm8350, sc8280xp and generic OSM L3 compatibles interconnect: qcom: osm-l3: Simplify osm_l3_set() interconnect: qcom: osm-l3: Add per-core EPSS L3 support interconnect: qcom: osm-l3: Squash common descriptors interconnect: qcom: osm-l3: Use platform-independent node ids dt-bindings: interconnect: qcom,msm8998-bwmon: Correct SC7280 CPU compatible
2 parents c5527c1 + 26e90ec commit bbb09f8

6 files changed

Lines changed: 61 additions & 107 deletions

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‎Documentation/devicetree/bindings/interconnect/qcom,msm8998-bwmon.yaml‎

Lines changed: 6 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -24,10 +24,15 @@ properties:
2424
oneOf:
2525
- items:
2626
- enum:
27-
- qcom,sc7280-bwmon
27+
- qcom,sc7280-cpu-bwmon
28+
- qcom,sc8280xp-cpu-bwmon
2829
- qcom,sdm845-bwmon
2930
- const: qcom,msm8998-bwmon
3031
- const: qcom,msm8998-bwmon # BWMON v4
32+
- items:
33+
- enum:
34+
- qcom,sc8280xp-llcc-bwmon
35+
- const: qcom,sc7280-llcc-bwmon
3136
- const: qcom,sc7280-llcc-bwmon # BWMON v5
3237
- const: qcom,sdm845-llcc-bwmon # BWMON v5
3338

‎Documentation/devicetree/bindings/interconnect/qcom,osm-l3.yaml‎

Lines changed: 16 additions & 8 deletions
Original file line numberDiff line numberDiff line change
@@ -16,13 +16,21 @@ description:
1616

1717
properties:
1818
compatible:
19-
enum:
20-
- qcom,sc7180-osm-l3
21-
- qcom,sc7280-epss-l3
22-
- qcom,sc8180x-osm-l3
23-
- qcom,sdm845-osm-l3
24-
- qcom,sm8150-osm-l3
25-
- qcom,sm8250-epss-l3
19+
oneOf:
20+
- items:
21+
- enum:
22+
- qcom,sc7180-osm-l3
23+
- qcom,sc8180x-osm-l3
24+
- qcom,sdm845-osm-l3
25+
- qcom,sm8150-osm-l3
26+
- const: qcom,osm-l3
27+
- items:
28+
- enum:
29+
- qcom,sc7280-epss-l3
30+
- qcom,sc8280xp-epss-l3
31+
- qcom,sm8250-epss-l3
32+
- qcom,sm8350-epss-l3
33+
- const: qcom,epss-l3
2634

2735
reg:
2836
maxItems: 1
@@ -56,7 +64,7 @@ examples:
5664
#define RPMH_CXO_CLK 0
5765
5866
osm_l3: interconnect@17d41000 {
59-
compatible = "qcom,sdm845-osm-l3";
67+
compatible = "qcom,sdm845-osm-l3", "qcom,osm-l3";
6068
reg = <0x17d41000 0x1400>;
6169
6270
clocks = <&rpmhcc RPMH_CXO_CLK>, <&gcc GPLL0>;

‎drivers/interconnect/qcom/icc-rpm.c‎

Lines changed: 1 addition & 4 deletions
Original file line numberDiff line numberDiff line change
@@ -477,11 +477,8 @@ int qnoc_probe(struct platform_device *pdev)
477477
}
478478

479479
mmio = devm_ioremap_resource(dev, res);
480-
481-
if (IS_ERR(mmio)) {
482-
dev_err(dev, "Cannot ioremap interconnect bus resource\n");
480+
if (IS_ERR(mmio))
483481
return PTR_ERR(mmio);
484-
}
485482

486483
qp->regmap = devm_regmap_init_mmio(dev, mmio, desc->regmap_cfg);
487484
if (IS_ERR(qp->regmap)) {

‎drivers/interconnect/qcom/osm-l3.c‎

Lines changed: 35 additions & 91 deletions
Original file line numberDiff line numberDiff line change
@@ -34,6 +34,7 @@
3434

3535
/* EPSS Register offsets */
3636
#define EPSS_LUT_ROW_SIZE 4
37+
#define EPSS_REG_L3_VOTE 0x90
3738
#define EPSS_REG_FREQ_LUT 0x100
3839
#define EPSS_REG_PERF_STATE 0x320
3940

@@ -74,6 +75,11 @@ struct qcom_osm_l3_desc {
7475
unsigned int reg_perf_state;
7576
};
7677

78+
enum {
79+
OSM_L3_MASTER_NODE = 10000,
80+
OSM_L3_SLAVE_NODE,
81+
};
82+
7783
#define DEFINE_QNODE(_name, _id, _buswidth, ...) \
7884
static const struct qcom_osm_l3_node _name = { \
7985
.name = #_name, \
@@ -83,123 +89,59 @@ struct qcom_osm_l3_desc {
8389
.links = { __VA_ARGS__ }, \
8490
}
8591

86-
DEFINE_QNODE(sdm845_osm_apps_l3, SDM845_MASTER_OSM_L3_APPS, 16, SDM845_SLAVE_OSM_L3);
87-
DEFINE_QNODE(sdm845_osm_l3, SDM845_SLAVE_OSM_L3, 16);
88-
89-
static const struct qcom_osm_l3_node * const sdm845_osm_l3_nodes[] = {
90-
[MASTER_OSM_L3_APPS] = &sdm845_osm_apps_l3,
91-
[SLAVE_OSM_L3] = &sdm845_osm_l3,
92-
};
92+
DEFINE_QNODE(osm_l3_master, OSM_L3_MASTER_NODE, 16, OSM_L3_SLAVE_NODE);
93+
DEFINE_QNODE(osm_l3_slave, OSM_L3_SLAVE_NODE, 16);
9394

94-
static const struct qcom_osm_l3_desc sdm845_icc_osm_l3 = {
95-
.nodes = sdm845_osm_l3_nodes,
96-
.num_nodes = ARRAY_SIZE(sdm845_osm_l3_nodes),
97-
.lut_row_size = OSM_LUT_ROW_SIZE,
98-
.reg_freq_lut = OSM_REG_FREQ_LUT,
99-
.reg_perf_state = OSM_REG_PERF_STATE,
95+
static const struct qcom_osm_l3_node * const osm_l3_nodes[] = {
96+
[MASTER_OSM_L3_APPS] = &osm_l3_master,
97+
[SLAVE_OSM_L3] = &osm_l3_slave,
10098
};
10199

102-
DEFINE_QNODE(sc7180_osm_apps_l3, SC7180_MASTER_OSM_L3_APPS, 16, SC7180_SLAVE_OSM_L3);
103-
DEFINE_QNODE(sc7180_osm_l3, SC7180_SLAVE_OSM_L3, 16);
100+
DEFINE_QNODE(epss_l3_master, OSM_L3_MASTER_NODE, 32, OSM_L3_SLAVE_NODE);
101+
DEFINE_QNODE(epss_l3_slave, OSM_L3_SLAVE_NODE, 32);
104102

105-
static const struct qcom_osm_l3_node * const sc7180_osm_l3_nodes[] = {
106-
[MASTER_OSM_L3_APPS] = &sc7180_osm_apps_l3,
107-
[SLAVE_OSM_L3] = &sc7180_osm_l3,
103+
static const struct qcom_osm_l3_node * const epss_l3_nodes[] = {
104+
[MASTER_EPSS_L3_APPS] = &epss_l3_master,
105+
[SLAVE_EPSS_L3_SHARED] = &epss_l3_slave,
108106
};
109107

110-
static const struct qcom_osm_l3_desc sc7180_icc_osm_l3 = {
111-
.nodes = sc7180_osm_l3_nodes,
112-
.num_nodes = ARRAY_SIZE(sc7180_osm_l3_nodes),
108+
static const struct qcom_osm_l3_desc osm_l3 = {
109+
.nodes = osm_l3_nodes,
110+
.num_nodes = ARRAY_SIZE(osm_l3_nodes),
113111
.lut_row_size = OSM_LUT_ROW_SIZE,
114112
.reg_freq_lut = OSM_REG_FREQ_LUT,
115113
.reg_perf_state = OSM_REG_PERF_STATE,
116114
};
117115

118-
DEFINE_QNODE(sc7280_epss_apps_l3, SC7280_MASTER_EPSS_L3_APPS, 32, SC7280_SLAVE_EPSS_L3);
119-
DEFINE_QNODE(sc7280_epss_l3, SC7280_SLAVE_EPSS_L3, 32);
120-
121-
static const struct qcom_osm_l3_node * const sc7280_epss_l3_nodes[] = {
122-
[MASTER_EPSS_L3_APPS] = &sc7280_epss_apps_l3,
123-
[SLAVE_EPSS_L3_SHARED] = &sc7280_epss_l3,
124-
};
125-
126-
static const struct qcom_osm_l3_desc sc7280_icc_epss_l3 = {
127-
.nodes = sc7280_epss_l3_nodes,
128-
.num_nodes = ARRAY_SIZE(sc7280_epss_l3_nodes),
116+
static const struct qcom_osm_l3_desc epss_l3_perf_state = {
117+
.nodes = epss_l3_nodes,
118+
.num_nodes = ARRAY_SIZE(epss_l3_nodes),
129119
.lut_row_size = EPSS_LUT_ROW_SIZE,
130120
.reg_freq_lut = EPSS_REG_FREQ_LUT,
131121
.reg_perf_state = EPSS_REG_PERF_STATE,
132122
};
133123

134-
DEFINE_QNODE(sc8180x_osm_apps_l3, SC8180X_MASTER_OSM_L3_APPS, 32, SC8180X_SLAVE_OSM_L3);
135-
DEFINE_QNODE(sc8180x_osm_l3, SC8180X_SLAVE_OSM_L3, 32);
136-
137-
static const struct qcom_osm_l3_node * const sc8180x_osm_l3_nodes[] = {
138-
[MASTER_OSM_L3_APPS] = &sc8180x_osm_apps_l3,
139-
[SLAVE_OSM_L3] = &sc8180x_osm_l3,
140-
};
141-
142-
static const struct qcom_osm_l3_desc sc8180x_icc_osm_l3 = {
143-
.nodes = sc8180x_osm_l3_nodes,
144-
.num_nodes = ARRAY_SIZE(sc8180x_osm_l3_nodes),
145-
.lut_row_size = OSM_LUT_ROW_SIZE,
146-
.reg_freq_lut = OSM_REG_FREQ_LUT,
147-
.reg_perf_state = OSM_REG_PERF_STATE,
148-
};
149-
150-
DEFINE_QNODE(sm8150_osm_apps_l3, SM8150_MASTER_OSM_L3_APPS, 32, SM8150_SLAVE_OSM_L3);
151-
DEFINE_QNODE(sm8150_osm_l3, SM8150_SLAVE_OSM_L3, 32);
152-
153-
static const struct qcom_osm_l3_node * const sm8150_osm_l3_nodes[] = {
154-
[MASTER_OSM_L3_APPS] = &sm8150_osm_apps_l3,
155-
[SLAVE_OSM_L3] = &sm8150_osm_l3,
156-
};
157-
158-
static const struct qcom_osm_l3_desc sm8150_icc_osm_l3 = {
159-
.nodes = sm8150_osm_l3_nodes,
160-
.num_nodes = ARRAY_SIZE(sm8150_osm_l3_nodes),
161-
.lut_row_size = OSM_LUT_ROW_SIZE,
162-
.reg_freq_lut = OSM_REG_FREQ_LUT,
163-
.reg_perf_state = OSM_REG_PERF_STATE,
164-
};
165-
166-
DEFINE_QNODE(sm8250_epss_apps_l3, SM8250_MASTER_EPSS_L3_APPS, 32, SM8250_SLAVE_EPSS_L3);
167-
DEFINE_QNODE(sm8250_epss_l3, SM8250_SLAVE_EPSS_L3, 32);
168-
169-
static const struct qcom_osm_l3_node * const sm8250_epss_l3_nodes[] = {
170-
[MASTER_EPSS_L3_APPS] = &sm8250_epss_apps_l3,
171-
[SLAVE_EPSS_L3_SHARED] = &sm8250_epss_l3,
172-
};
173-
174-
static const struct qcom_osm_l3_desc sm8250_icc_epss_l3 = {
175-
.nodes = sm8250_epss_l3_nodes,
176-
.num_nodes = ARRAY_SIZE(sm8250_epss_l3_nodes),
124+
static const struct qcom_osm_l3_desc epss_l3_l3_vote = {
125+
.nodes = epss_l3_nodes,
126+
.num_nodes = ARRAY_SIZE(epss_l3_nodes),
177127
.lut_row_size = EPSS_LUT_ROW_SIZE,
178128
.reg_freq_lut = EPSS_REG_FREQ_LUT,
179-
.reg_perf_state = EPSS_REG_PERF_STATE,
129+
.reg_perf_state = EPSS_REG_L3_VOTE,
180130
};
181131

182132
static int qcom_osm_l3_set(struct icc_node *src, struct icc_node *dst)
183133
{
184134
struct qcom_osm_l3_icc_provider *qp;
185135
struct icc_provider *provider;
186136
const struct qcom_osm_l3_node *qn;
187-
struct icc_node *n;
188137
unsigned int index;
189-
u32 agg_peak = 0;
190-
u32 agg_avg = 0;
191138
u64 rate;
192139

193140
qn = src->data;
194141
provider = src->provider;
195142
qp = to_osm_l3_provider(provider);
196143

197-
list_for_each_entry(n, &provider->nodes, node_list)
198-
provider->aggregate(n, 0, n->avg_bw, n->peak_bw,
199-
&agg_avg, &agg_peak);
200-
201-
rate = max(agg_avg, agg_peak);
202-
rate = icc_units_to_bps(rate);
144+
rate = icc_units_to_bps(dst->peak_bw);
203145
do_div(rate, qn->buswidth);
204146

205147
for (index = 0; index < qp->max_state - 1; index++) {
@@ -344,12 +286,14 @@ static int qcom_osm_l3_probe(struct platform_device *pdev)
344286
}
345287

346288
static const struct of_device_id osm_l3_of_match[] = {
347-
{ .compatible = "qcom,sc7180-osm-l3", .data = &sc7180_icc_osm_l3 },
348-
{ .compatible = "qcom,sc7280-epss-l3", .data = &sc7280_icc_epss_l3 },
349-
{ .compatible = "qcom,sdm845-osm-l3", .data = &sdm845_icc_osm_l3 },
350-
{ .compatible = "qcom,sm8150-osm-l3", .data = &sm8150_icc_osm_l3 },
351-
{ .compatible = "qcom,sc8180x-osm-l3", .data = &sc8180x_icc_osm_l3 },
352-
{ .compatible = "qcom,sm8250-epss-l3", .data = &sm8250_icc_epss_l3 },
289+
{ .compatible = "qcom,epss-l3", .data = &epss_l3_l3_vote },
290+
{ .compatible = "qcom,osm-l3", .data = &osm_l3 },
291+
{ .compatible = "qcom,sc7180-osm-l3", .data = &osm_l3 },
292+
{ .compatible = "qcom,sc7280-epss-l3", .data = &epss_l3_perf_state },
293+
{ .compatible = "qcom,sdm845-osm-l3", .data = &osm_l3 },
294+
{ .compatible = "qcom,sm8150-osm-l3", .data = &osm_l3 },
295+
{ .compatible = "qcom,sc8180x-osm-l3", .data = &osm_l3 },
296+
{ .compatible = "qcom,sm8250-epss-l3", .data = &epss_l3_perf_state },
353297
{ }
354298
};
355299
MODULE_DEVICE_TABLE(of, osm_l3_of_match);

‎drivers/interconnect/qcom/sc7180.c‎

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -369,7 +369,7 @@ static const struct qcom_icc_desc sc7180_gem_noc = {
369369
.num_bcms = ARRAY_SIZE(gem_noc_bcms),
370370
};
371371

372-
static struct qcom_icc_bcm *mc_virt_bcms[] = {
372+
static struct qcom_icc_bcm * const mc_virt_bcms[] = {
373373
&bcm_acv,
374374
&bcm_mc0,
375375
};
@@ -443,7 +443,7 @@ static struct qcom_icc_node * const qup_virt_nodes[] = {
443443
[SLAVE_QUP_CORE_1] = &qup_core_slave_2,
444444
};
445445

446-
static const struct qcom_icc_desc sc7180_qup_virt = {
446+
static const struct qcom_icc_desc sc7180_qup_virt = {
447447
.nodes = qup_virt_nodes,
448448
.num_nodes = ARRAY_SIZE(qup_virt_nodes),
449449
.bcms = qup_virt_bcms,

‎drivers/interconnect/qcom/sc8180x.c‎

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -1889,7 +1889,7 @@ static struct qcom_icc_bcm * const qup_virt_bcms[] = {
18891889
&bcm_qup0,
18901890
};
18911891

1892-
static struct qcom_icc_node *qup_virt_nodes[] = {
1892+
static struct qcom_icc_node * const qup_virt_nodes[] = {
18931893
[MASTER_QUP_CORE_0] = &mas_qup_core_0,
18941894
[MASTER_QUP_CORE_1] = &mas_qup_core_1,
18951895
[MASTER_QUP_CORE_2] = &mas_qup_core_2,

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