Skip to content

Commit bbea276

Browse files
author
Marc Zyngier
committed
KVM: arm64: Inherit RESx bits from FGT register descriptors
The FGT registers have their computed RESx bits stashed in specific descriptors, which we can easily use when computing the masks used for the guest. This removes a bit of boilerplate code. Reviewed-by: Joey Gouly <joey.gouly@arm.com> Reviewed-by: Fuad Tabba <tabba@google.com> Tested-by: Fuad Tabba <tabba@google.com> Link: https://patch.msgid.link/20260202184329.2724080-7-maz@kernel.org Signed-off-by: Marc Zyngier <maz@kernel.org>
1 parent f9d5895 commit bbea276

1 file changed

Lines changed: 5 additions & 11 deletions

File tree

arch/arm64/kvm/config.c

Lines changed: 5 additions & 11 deletions
Original file line numberDiff line numberDiff line change
@@ -1342,6 +1342,11 @@ static struct resx compute_reg_resx_bits(struct kvm *kvm,
13421342
resx = compute_resx_bits(kvm, r->bit_feat_map, r->bit_feat_map_sz,
13431343
require, exclude);
13441344

1345+
if (r->feat_map.flags & MASKS_POINTER) {
1346+
resx.res0 |= r->feat_map.masks->res0;
1347+
resx.res1 |= r->feat_map.masks->res1;
1348+
}
1349+
13451350
tmp = compute_resx_bits(kvm, &r->feat_map, 1, require, exclude);
13461351

13471352
resx.res0 |= tmp.res0;
@@ -1422,47 +1427,36 @@ struct resx get_reg_fixed_bits(struct kvm *kvm, enum vcpu_sysreg reg)
14221427
switch (reg) {
14231428
case HFGRTR_EL2:
14241429
resx = compute_reg_resx_bits(kvm, &hfgrtr_desc, 0, 0);
1425-
resx.res1 |= HFGRTR_EL2_RES1;
14261430
break;
14271431
case HFGWTR_EL2:
14281432
resx = compute_reg_resx_bits(kvm, &hfgwtr_desc, 0, 0);
1429-
resx.res1 |= HFGWTR_EL2_RES1;
14301433
break;
14311434
case HFGITR_EL2:
14321435
resx = compute_reg_resx_bits(kvm, &hfgitr_desc, 0, 0);
1433-
resx.res1 |= HFGITR_EL2_RES1;
14341436
break;
14351437
case HDFGRTR_EL2:
14361438
resx = compute_reg_resx_bits(kvm, &hdfgrtr_desc, 0, 0);
1437-
resx.res1 |= HDFGRTR_EL2_RES1;
14381439
break;
14391440
case HDFGWTR_EL2:
14401441
resx = compute_reg_resx_bits(kvm, &hdfgwtr_desc, 0, 0);
1441-
resx.res1 |= HDFGWTR_EL2_RES1;
14421442
break;
14431443
case HAFGRTR_EL2:
14441444
resx = compute_reg_resx_bits(kvm, &hafgrtr_desc, 0, 0);
1445-
resx.res1 |= HAFGRTR_EL2_RES1;
14461445
break;
14471446
case HFGRTR2_EL2:
14481447
resx = compute_reg_resx_bits(kvm, &hfgrtr2_desc, 0, 0);
1449-
resx.res1 |= HFGRTR2_EL2_RES1;
14501448
break;
14511449
case HFGWTR2_EL2:
14521450
resx = compute_reg_resx_bits(kvm, &hfgwtr2_desc, 0, 0);
1453-
resx.res1 |= HFGWTR2_EL2_RES1;
14541451
break;
14551452
case HFGITR2_EL2:
14561453
resx = compute_reg_resx_bits(kvm, &hfgitr2_desc, 0, 0);
1457-
resx.res1 |= HFGITR2_EL2_RES1;
14581454
break;
14591455
case HDFGRTR2_EL2:
14601456
resx = compute_reg_resx_bits(kvm, &hdfgrtr2_desc, 0, 0);
1461-
resx.res1 |= HDFGRTR2_EL2_RES1;
14621457
break;
14631458
case HDFGWTR2_EL2:
14641459
resx = compute_reg_resx_bits(kvm, &hdfgwtr2_desc, 0, 0);
1465-
resx.res1 |= HDFGWTR2_EL2_RES1;
14661460
break;
14671461
case HCRX_EL2:
14681462
resx = compute_reg_resx_bits(kvm, &hcrx_desc, 0, 0);

0 commit comments

Comments
 (0)