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Robert Richterdavejiang
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cxl/region: Separate region parameter setup and region construction
To construct a region, the region parameters such as address range and interleaving config need to be determined. This is done while constructing the region by inspecting the endpoint decoder configuration. The endpoint decoder is passed as a function argument. With address translation the endpoint decoder data is no longer sufficient to extract the region parameters as some of the information is obtained using other methods such as using firmware calls. In a first step, separate code to determine the region parameters from the region construction. Temporarily store all the data to create the region in the new struct cxl_region_context. Once the region data is determined and struct cxl_region_context is filled, construct the region. Patch is a prerequisite to implement address translation. The code separation helps to later extend it to determine region parameters using other methods as needed, esp. to support address translation. Reviewed-by: Gregory Price <gourry@gourry.net> Reviewed-by: Dave Jiang <dave.jiang@intel.com> Reviewed-by: Jonathan Cameron <jonathan.cameron@huawei.com> Reviewed-by: Alison Schofield <alison.schofield@intel.com> Tested-by: Gregory Price <gourry@gourry.net> Signed-off-by: Robert Richter <rrichter@amd.com> Link: https://patch.msgid.link/20260114164837.1076338-6-rrichter@amd.com Signed-off-by: Dave Jiang <dave.jiang@intel.com>
1 parent 3e422ca commit bc01fd5

2 files changed

Lines changed: 26 additions & 9 deletions

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drivers/cxl/core/core.h

Lines changed: 8 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -19,6 +19,14 @@ enum cxl_detach_mode {
1919
};
2020

2121
#ifdef CONFIG_CXL_REGION
22+
23+
struct cxl_region_context {
24+
struct cxl_endpoint_decoder *cxled;
25+
struct range hpa_range;
26+
int interleave_ways;
27+
int interleave_granularity;
28+
};
29+
2230
extern struct device_attribute dev_attr_create_pmem_region;
2331
extern struct device_attribute dev_attr_create_ram_region;
2432
extern struct device_attribute dev_attr_delete_region;

drivers/cxl/core/region.c

Lines changed: 18 additions & 9 deletions
Original file line numberDiff line numberDiff line change
@@ -3565,11 +3565,12 @@ static int cxl_extended_linear_cache_resize(struct cxl_region *cxlr,
35653565
}
35663566

35673567
static int __construct_region(struct cxl_region *cxlr,
3568-
struct cxl_endpoint_decoder *cxled)
3568+
struct cxl_region_context *ctx)
35693569
{
3570+
struct cxl_endpoint_decoder *cxled = ctx->cxled;
35703571
struct cxl_root_decoder *cxlrd = cxlr->cxlrd;
35713572
struct cxl_memdev *cxlmd = cxled_to_memdev(cxled);
3572-
struct range *hpa_range = &cxled->cxld.hpa_range;
3573+
struct range *hpa_range = &ctx->hpa_range;
35733574
struct cxl_region_params *p;
35743575
struct resource *res;
35753576
int rc;
@@ -3622,8 +3623,8 @@ static int __construct_region(struct cxl_region *cxlr,
36223623
}
36233624

36243625
p->res = res;
3625-
p->interleave_ways = cxled->cxld.interleave_ways;
3626-
p->interleave_granularity = cxled->cxld.interleave_granularity;
3626+
p->interleave_ways = ctx->interleave_ways;
3627+
p->interleave_granularity = ctx->interleave_granularity;
36273628
p->state = CXL_CONFIG_INTERLEAVE_ACTIVE;
36283629

36293630
rc = sysfs_update_group(&cxlr->dev.kobj, get_cxl_region_target_group());
@@ -3643,8 +3644,9 @@ static int __construct_region(struct cxl_region *cxlr,
36433644

36443645
/* Establish an empty region covering the given HPA range */
36453646
static struct cxl_region *construct_region(struct cxl_root_decoder *cxlrd,
3646-
struct cxl_endpoint_decoder *cxled)
3647+
struct cxl_region_context *ctx)
36473648
{
3649+
struct cxl_endpoint_decoder *cxled = ctx->cxled;
36483650
struct cxl_memdev *cxlmd = cxled_to_memdev(cxled);
36493651
struct cxl_port *port = cxlrd_to_port(cxlrd);
36503652
struct cxl_dev_state *cxlds = cxlmd->cxlds;
@@ -3664,7 +3666,7 @@ static struct cxl_region *construct_region(struct cxl_root_decoder *cxlrd,
36643666
return cxlr;
36653667
}
36663668

3667-
rc = __construct_region(cxlr, cxled);
3669+
rc = __construct_region(cxlr, ctx);
36683670
if (rc) {
36693671
devm_release_action(port->uport_dev, unregister_region, cxlr);
36703672
return ERR_PTR(rc);
@@ -3689,11 +3691,18 @@ cxl_find_region_by_range(struct cxl_root_decoder *cxlrd,
36893691

36903692
int cxl_add_to_region(struct cxl_endpoint_decoder *cxled)
36913693
{
3692-
struct range *hpa_range = &cxled->cxld.hpa_range;
3694+
struct cxl_region_context ctx;
36933695
struct cxl_region_params *p;
36943696
bool attach = false;
36953697
int rc;
36963698

3699+
ctx = (struct cxl_region_context) {
3700+
.cxled = cxled,
3701+
.hpa_range = cxled->cxld.hpa_range,
3702+
.interleave_ways = cxled->cxld.interleave_ways,
3703+
.interleave_granularity = cxled->cxld.interleave_granularity,
3704+
};
3705+
36973706
struct cxl_root_decoder *cxlrd __free(put_cxl_root_decoder) =
36983707
cxl_find_root_decoder(cxled);
36993708
if (!cxlrd)
@@ -3706,9 +3715,9 @@ int cxl_add_to_region(struct cxl_endpoint_decoder *cxled)
37063715
*/
37073716
mutex_lock(&cxlrd->range_lock);
37083717
struct cxl_region *cxlr __free(put_cxl_region) =
3709-
cxl_find_region_by_range(cxlrd, hpa_range);
3718+
cxl_find_region_by_range(cxlrd, &ctx.hpa_range);
37103719
if (!cxlr)
3711-
cxlr = construct_region(cxlrd, cxled);
3720+
cxlr = construct_region(cxlrd, &ctx);
37123721
mutex_unlock(&cxlrd->range_lock);
37133722

37143723
rc = PTR_ERR_OR_ZERO(cxlr);

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