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M-Vaittinenlag-linaro
M-Vaittinen
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lag-linaro
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power: supply: bd71828-power: Support ROHM BD72720
The ROHM BD72720 is a power management IC with a charger and coulomb counter block which is closely related to the charger / coulomb counter found from the BD71815, BD71828, BD71879 which are all supported by the bd71828-power driver. Due to the similarities it makes sense to support also the BD72720 with the same driver. Add basic support for the charger logic on ROHM BD72720. Signed-off-by: Matti Vaittinen <mazziesaccount@gmail.com> Link: https://patch.msgid.link/fb74c0cab3dfe534135d26dbbb9c66699678c2de.1765804226.git.mazziesaccount@gmail.com Signed-off-by: Lee Jones <lee@kernel.org>
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Lines changed: 116 additions & 18 deletions

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‎drivers/power/supply/bd71828-power.c‎

Lines changed: 116 additions & 18 deletions
Original file line numberDiff line numberDiff line change
@@ -5,6 +5,7 @@
55
#include <linux/kernel.h>
66
#include <linux/mfd/rohm-bd71815.h>
77
#include <linux/mfd/rohm-bd71828.h>
8+
#include <linux/mfd/rohm-bd72720.h>
89
#include <linux/module.h>
910
#include <linux/mod_devicetable.h>
1011
#include <linux/platform_device.h>
@@ -51,12 +52,14 @@ struct pwr_regs {
5152
unsigned int chg_state;
5253
unsigned int bat_temp;
5354
unsigned int dcin_stat;
55+
unsigned int dcin_online_mask;
5456
unsigned int dcin_collapse_limit;
5557
unsigned int chg_set1;
5658
unsigned int chg_en;
5759
unsigned int vbat_alm_limit_u;
5860
unsigned int conf;
5961
unsigned int vdcin;
62+
unsigned int vdcin_himask;
6063
};
6164

6265
static const struct pwr_regs pwr_regs_bd71828 = {
@@ -67,12 +70,14 @@ static const struct pwr_regs pwr_regs_bd71828 = {
6770
.chg_state = BD71828_REG_CHG_STATE,
6871
.bat_temp = BD71828_REG_BAT_TEMP,
6972
.dcin_stat = BD71828_REG_DCIN_STAT,
73+
.dcin_online_mask = BD7182x_MASK_DCIN_DET,
7074
.dcin_collapse_limit = BD71828_REG_DCIN_CLPS,
7175
.chg_set1 = BD71828_REG_CHG_SET1,
7276
.chg_en = BD71828_REG_CHG_EN,
7377
.vbat_alm_limit_u = BD71828_REG_ALM_VBAT_LIMIT_U,
7478
.conf = BD71828_REG_CONF,
7579
.vdcin = BD71828_REG_VDCIN_U,
80+
.vdcin_himask = BD7182x_MASK_VDCIN_U,
7681
};
7782

7883
static const struct pwr_regs pwr_regs_bd71815 = {
@@ -85,13 +90,39 @@ static const struct pwr_regs pwr_regs_bd71815 = {
8590
.chg_state = BD71815_REG_CHG_STATE,
8691
.bat_temp = BD71815_REG_BAT_TEMP,
8792
.dcin_stat = BD71815_REG_DCIN_STAT,
93+
.dcin_online_mask = BD7182x_MASK_DCIN_DET,
8894
.dcin_collapse_limit = BD71815_REG_DCIN_CLPS,
8995
.chg_set1 = BD71815_REG_CHG_SET1,
9096
.chg_en = BD71815_REG_CHG_SET1,
9197
.vbat_alm_limit_u = BD71815_REG_ALM_VBAT_TH_U,
9298
.conf = BD71815_REG_CONF,
9399

94100
.vdcin = BD71815_REG_VM_DCIN_U,
101+
.vdcin_himask = BD7182x_MASK_VDCIN_U,
102+
};
103+
104+
static struct pwr_regs pwr_regs_bd72720 = {
105+
.vbat_avg = BD72720_REG_VM_SA_VBAT_U,
106+
.ibat = BD72720_REG_CC_CURCD_U,
107+
.ibat_avg = BD72720_REG_CC_SA_CURCD_U,
108+
.btemp_vth = BD72720_REG_VM_BTMP_U,
109+
/*
110+
* Note, state 0x40 IMP_CHK. not documented
111+
* on other variants but was still handled in
112+
* existing code. No memory traces as to why.
113+
*/
114+
.chg_state = BD72720_REG_CHG_STATE,
115+
.bat_temp = BD72720_REG_CHG_BAT_TEMP_STAT,
116+
.dcin_stat = BD72720_REG_INT_VBUS_SRC,
117+
.dcin_online_mask = BD72720_MASK_DCIN_DET,
118+
.dcin_collapse_limit = -1, /* Automatic. Setting not supported */
119+
.chg_set1 = BD72720_REG_CHG_SET_1,
120+
.chg_en = BD72720_REG_CHG_EN,
121+
/* 15mV note in data-sheet */
122+
.vbat_alm_limit_u = BD72720_REG_ALM_VBAT_TH_U,
123+
.conf = BD72720_REG_CONF, /* o XSTB, only PON. Seprate slave addr */
124+
.vdcin = BD72720_REG_VM_VBUS_U, /* 10 bits not 11 as with other ICs */
125+
.vdcin_himask = BD72720_MASK_VDCIN_U,
95126
};
96127

97128
struct bd71828_power {
@@ -298,7 +329,7 @@ static int get_chg_online(struct bd71828_power *pwr, int *chg_online)
298329
dev_err(pwr->dev, "Failed to read DCIN status\n");
299330
return ret;
300331
}
301-
*chg_online = ((r & BD7182x_MASK_DCIN_DET) != 0);
332+
*chg_online = ((r & pwr->regs->dcin_online_mask) != 0);
302333

303334
return 0;
304335
}
@@ -329,8 +360,8 @@ static int bd71828_bat_inserted(struct bd71828_power *pwr)
329360
ret = val & BD7182x_MASK_CONF_PON;
330361

331362
if (ret)
332-
regmap_update_bits(pwr->regmap, pwr->regs->conf,
333-
BD7182x_MASK_CONF_PON, 0);
363+
if (regmap_update_bits(pwr->regmap, pwr->regs->conf, BD7182x_MASK_CONF_PON, 0))
364+
dev_err(pwr->dev, "Failed to write CONF register\n");
334365

335366
return ret;
336367
}
@@ -358,11 +389,13 @@ static int bd71828_init_hardware(struct bd71828_power *pwr)
358389
int ret;
359390

360391
/* TODO: Collapse limit should come from device-tree ? */
361-
ret = regmap_write(pwr->regmap, pwr->regs->dcin_collapse_limit,
362-
BD7182x_DCIN_COLLAPSE_DEFAULT);
363-
if (ret) {
364-
dev_err(pwr->dev, "Failed to write DCIN collapse limit\n");
365-
return ret;
392+
if (pwr->regs->dcin_collapse_limit != (unsigned int)-1) {
393+
ret = regmap_write(pwr->regmap, pwr->regs->dcin_collapse_limit,
394+
BD7182x_DCIN_COLLAPSE_DEFAULT);
395+
if (ret) {
396+
dev_err(pwr->dev, "Failed to write DCIN collapse limit\n");
397+
return ret;
398+
}
366399
}
367400

368401
ret = pwr->bat_inserted(pwr);
@@ -419,7 +452,7 @@ static int bd71828_charger_get_property(struct power_supply *psy,
419452
break;
420453
case POWER_SUPPLY_PROP_VOLTAGE_NOW:
421454
ret = bd7182x_read16_himask(pwr, pwr->regs->vdcin,
422-
BD7182x_MASK_VDCIN_U, &tmp);
455+
pwr->regs->vdcin_himask, &tmp);
423456
if (ret)
424457
return ret;
425458

@@ -630,6 +663,9 @@ BD_ISR_AC(dcin_ovp_det, "DCIN OVER VOLTAGE", true)
630663
BD_ISR_DUMMY(dcin_mon_det, "DCIN voltage below threshold")
631664
BD_ISR_DUMMY(dcin_mon_res, "DCIN voltage above threshold")
632665

666+
BD_ISR_DUMMY(vbus_curr_limit, "VBUS current limited")
667+
BD_ISR_DUMMY(vsys_ov_res, "VSYS over-voltage cleared")
668+
BD_ISR_DUMMY(vsys_ov_det, "VSYS over-voltage")
633669
BD_ISR_DUMMY(vsys_uv_res, "VSYS under-voltage cleared")
634670
BD_ISR_DUMMY(vsys_uv_det, "VSYS under-voltage")
635671
BD_ISR_DUMMY(vsys_low_res, "'VSYS low' cleared")
@@ -878,6 +914,51 @@ static int bd7182x_get_irqs(struct platform_device *pdev,
878914
BDIRQ("bd71828-temp-125-over", bd71828_temp_vf125_det),
879915
BDIRQ("bd71828-temp-125-under", bd71828_temp_vf125_res),
880916
};
917+
static const struct bd7182x_irq_res bd72720_irqs[] = {
918+
BDIRQ("bd72720_int_vbus_rmv", BD_ISR_NAME(dcin_removed)),
919+
BDIRQ("bd72720_int_vbus_det", bd7182x_dcin_detected),
920+
BDIRQ("bd72720_int_vbus_mon_res", BD_ISR_NAME(dcin_mon_res)),
921+
BDIRQ("bd72720_int_vbus_mon_det", BD_ISR_NAME(dcin_mon_det)),
922+
BDIRQ("bd72720_int_vsys_mon_res", BD_ISR_NAME(vsys_mon_res)),
923+
BDIRQ("bd72720_int_vsys_mon_det", BD_ISR_NAME(vsys_mon_det)),
924+
BDIRQ("bd72720_int_vsys_uv_res", BD_ISR_NAME(vsys_uv_res)),
925+
BDIRQ("bd72720_int_vsys_uv_det", BD_ISR_NAME(vsys_uv_det)),
926+
BDIRQ("bd72720_int_vsys_lo_res", BD_ISR_NAME(vsys_low_res)),
927+
BDIRQ("bd72720_int_vsys_lo_det", BD_ISR_NAME(vsys_low_det)),
928+
BDIRQ("bd72720_int_vsys_ov_res", BD_ISR_NAME(vsys_ov_res)),
929+
BDIRQ("bd72720_int_vsys_ov_det", BD_ISR_NAME(vsys_ov_det)),
930+
BDIRQ("bd72720_int_bat_ilim", BD_ISR_NAME(vbus_curr_limit)),
931+
BDIRQ("bd72720_int_chg_done", bd718x7_chg_done),
932+
BDIRQ("bd72720_int_extemp_tout", BD_ISR_NAME(chg_wdg_temp)),
933+
BDIRQ("bd72720_int_chg_wdt_exp", BD_ISR_NAME(chg_wdg)),
934+
BDIRQ("bd72720_int_bat_mnt_out", BD_ISR_NAME(rechg_res)),
935+
BDIRQ("bd72720_int_bat_mnt_in", BD_ISR_NAME(rechg_det)),
936+
BDIRQ("bd72720_int_chg_trns", BD_ISR_NAME(chg_state_changed)),
937+
938+
BDIRQ("bd72720_int_vbat_mon_res", BD_ISR_NAME(bat_mon_res)),
939+
BDIRQ("bd72720_int_vbat_mon_det", BD_ISR_NAME(bat_mon)),
940+
BDIRQ("bd72720_int_vbat_sht_res", BD_ISR_NAME(bat_short_res)),
941+
BDIRQ("bd72720_int_vbat_sht_det", BD_ISR_NAME(bat_short)),
942+
BDIRQ("bd72720_int_vbat_lo_res", BD_ISR_NAME(bat_low_res)),
943+
BDIRQ("bd72720_int_vbat_lo_det", BD_ISR_NAME(bat_low)),
944+
BDIRQ("bd72720_int_vbat_ov_res", BD_ISR_NAME(bat_ov_res)),
945+
BDIRQ("bd72720_int_vbat_ov_det", BD_ISR_NAME(bat_ov)),
946+
BDIRQ("bd72720_int_bat_rmv", BD_ISR_NAME(bat_removed)),
947+
BDIRQ("bd72720_int_bat_det", BD_ISR_NAME(bat_det)),
948+
BDIRQ("bd72720_int_dbat_det", BD_ISR_NAME(bat_dead)),
949+
BDIRQ("bd72720_int_bat_temp_trns", BD_ISR_NAME(temp_transit)),
950+
BDIRQ("bd72720_int_lobtmp_res", BD_ISR_NAME(temp_bat_low_res)),
951+
BDIRQ("bd72720_int_lobtmp_det", BD_ISR_NAME(temp_bat_low)),
952+
BDIRQ("bd72720_int_ovbtmp_res", BD_ISR_NAME(temp_bat_hi_res)),
953+
BDIRQ("bd72720_int_ovbtmp_det", BD_ISR_NAME(temp_bat_hi)),
954+
BDIRQ("bd72720_int_ocur1_res", BD_ISR_NAME(bat_oc1_res)),
955+
BDIRQ("bd72720_int_ocur1_det", BD_ISR_NAME(bat_oc1)),
956+
BDIRQ("bd72720_int_ocur2_res", BD_ISR_NAME(bat_oc2_res)),
957+
BDIRQ("bd72720_int_ocur2_det", BD_ISR_NAME(bat_oc2)),
958+
BDIRQ("bd72720_int_ocur3_res", BD_ISR_NAME(bat_oc3_res)),
959+
BDIRQ("bd72720_int_ocur3_det", BD_ISR_NAME(bat_oc3)),
960+
BDIRQ("bd72720_int_cc_mon2_det", BD_ISR_NAME(bat_cc_mon)),
961+
};
881962
int num_irqs;
882963
const struct bd7182x_irq_res *irqs;
883964

@@ -890,6 +971,10 @@ static int bd7182x_get_irqs(struct platform_device *pdev,
890971
irqs = &bd71815_irqs[0];
891972
num_irqs = ARRAY_SIZE(bd71815_irqs);
892973
break;
974+
case ROHM_CHIP_TYPE_BD72720:
975+
irqs = &bd72720_irqs[0];
976+
num_irqs = ARRAY_SIZE(bd72720_irqs);
977+
break;
893978
default:
894979
return -EINVAL;
895980
}
@@ -958,21 +1043,27 @@ static int bd71828_power_probe(struct platform_device *pdev)
9581043
struct power_supply_config ac_cfg = {};
9591044
struct power_supply_config bat_cfg = {};
9601045
int ret;
961-
struct regmap *regmap;
962-
963-
regmap = dev_get_regmap(pdev->dev.parent, NULL);
964-
if (!regmap) {
965-
dev_err(&pdev->dev, "No parent regmap\n");
966-
return -EINVAL;
967-
}
9681046

9691047
pwr = devm_kzalloc(&pdev->dev, sizeof(*pwr), GFP_KERNEL);
9701048
if (!pwr)
9711049
return -ENOMEM;
9721050

973-
pwr->regmap = regmap;
974-
pwr->dev = &pdev->dev;
1051+
/*
1052+
* The BD72720 MFD device registers two regmaps. Power-supply driver
1053+
* uses the "wrap-map", which provides access to both of the I2C slave
1054+
* addresses used by the BD72720
1055+
*/
9751056
pwr->chip_type = platform_get_device_id(pdev)->driver_data;
1057+
if (pwr->chip_type != ROHM_CHIP_TYPE_BD72720)
1058+
pwr->regmap = dev_get_regmap(pdev->dev.parent, NULL);
1059+
else
1060+
pwr->regmap = dev_get_regmap(pdev->dev.parent, "wrap-map");
1061+
if (!pwr->regmap) {
1062+
dev_err(&pdev->dev, "No parent regmap\n");
1063+
return -EINVAL;
1064+
}
1065+
1066+
pwr->dev = &pdev->dev;
9761067

9771068
switch (pwr->chip_type) {
9781069
case ROHM_CHIP_TYPE_BD71828:
@@ -985,6 +1076,12 @@ static int bd71828_power_probe(struct platform_device *pdev)
9851076
pwr->get_temp = bd71815_get_temp;
9861077
pwr->regs = &pwr_regs_bd71815;
9871078
break;
1079+
case ROHM_CHIP_TYPE_BD72720:
1080+
pwr->bat_inserted = bd71828_bat_inserted;
1081+
pwr->regs = &pwr_regs_bd72720;
1082+
pwr->get_temp = bd71828_get_temp;
1083+
dev_dbg(pwr->dev, "Found ROHM BD72720\n");
1084+
break;
9881085
default:
9891086
dev_err(pwr->dev, "Unknown PMIC\n");
9901087
return -EINVAL;
@@ -1030,6 +1127,7 @@ static int bd71828_power_probe(struct platform_device *pdev)
10301127
static const struct platform_device_id bd71828_charger_id[] = {
10311128
{ "bd71815-power", ROHM_CHIP_TYPE_BD71815 },
10321129
{ "bd71828-power", ROHM_CHIP_TYPE_BD71828 },
1130+
{ "bd72720-power", ROHM_CHIP_TYPE_BD72720 },
10331131
{ },
10341132
};
10351133
MODULE_DEVICE_TABLE(platform, bd71828_charger_id);

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