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Merge tag 'drm-xe-next-2024-12-11' of https://gitlab.freedesktop.org/drm/xe/kernel into drm-next
UAPI Changes: - Make OA buffer size configurable (Sai) Display Changes (including i915): - Fix ttm_bo_access() usage (Auld) - Power request asserting/deasserting for Xe3lpd (Mika) - One Type-C conversion towards struct intel_display (Mika) Driver Changes: - GuC capture related fixes (Everest, Zhanjun) - Move old workaround to OOB infra (Lucas) - Compute mode change refactoring (Bala) - Add ufence and g2h flushes for LNL Hybrid timeouts (Nirmoy) - Avoid unnecessary OOM kills (Thomas) - Restore system memory GGTT mappings (Brost) - Fix build error for XE_IOCTL_DBG macro (Gyeyoung) - Documentation updates and fixes (Lucas, Randy) - A few exec IOCTL fixes (Brost) - Fix potential GGTT allocation leak (Michal) - Fix races on fdinfo (Lucas) - SRIOV VF: Post-migration recovery worker basis (Tomasz) - GuC Communication fixes and improvements (Michal, John, Tomasz, Auld, Jonathan) - SRIOV PF: Add support for VF scheduling priority - Trace improvements (Lucas, Auld, Oak) - Hibernation on igpu fixes and improvements (Auld) - GT oriented logs/asserts improvements (Michal) - Take job list lock in xe_sched_first_pending_job (Nirmoy) - GSC: Improve SW proxy error checking and logging (Daniele) - GuC crash notifications & drop default log verbosity (John) - Fix races on fdinfo (Lucas) - Fix runtime_pm handling in OA (Ashutosh) - Allow fault injection in vm create and vm bind IOCTLs (Francois) - TLB invalidation fixes (Nirmoy, Daniele) - Devcoredump Improvements, doc and fixes (Brost, Lucas, Zhanjun, John) - Wake up waiters after setting ufence->signalled (Nirmoy) - Mark preempt fence workqueue as reclaim (Brost) - Trivial header/flags cleanups (Lucas) - VRAM drop 2G block restriction (Auld) - Drop useless d3cold allowed message (Brost) - SRIOV PF: Drop 2GiB limit of fair LMEM allocation (Michal) - Add another PTL PCI ID (Atwood) - Allow bo mapping on multiple ggtts (Niranjana) - Add support for GuC-to-GuC communication (John) - Update xe2_graphics name string (Roper) - VRAM: fix lpfn check (Auld) - Ad Xe3 workaround (Apoorva) - Migrate fixes (Auld) - Fix non-contiguous VRAM BO access (Brost) - Log throttle reasons (Raag) - Enable PMT support for BMG (Michael) - IRQ related fixes and improvements (Ilia) - Avoid evicting object of the same vm in none fault mode (Oak) - Fix in tests (Nirmoy) - Fix ERR_PTR handling (Mirsad) - Some reg_sr/whitelist fixes and refactors (Lucas) Signed-off-by: Dave Airlie <airlied@redhat.com> # -----BEGIN PGP SIGNATURE----- # # iQEzBAABCAAdFiEEbSBwaO7dZQkcLOKj+mJfZA7rE8oFAmdaHkMACgkQ+mJfZA7r # E8o+twf/XYZTk4O3qQ+yNL3PDQT0NIKjH8mEnmu4udyIw/sYhQe6ji+uh1YutK8Y # 41IQc06qQogTj36bqSwbjThw5asMfRh2sNR/p1uOy7RGUnN25FuYSXEgOeDWi/Ec # xrZE1TKPotFGeGI09KJmzjzMq94cgv97Pxma+5m8BjVsvzXQSzEJ2r9cC6ruSfNT # O5Jq5nqxHSkWUbKCxPnixSlGnH4jbsuiqS1E1pnH+u6ijxsfhOJj686wLn2FRkiw # 6FhXmJBrd8AZ0Q2E7h3UswE5O88I0ALDc58OINAzD1GMyzvZj2vB1pXgj5uNr0/x # Ku4cxu1jprsi+FLUdKAdYpxRBRanow== # =3Ou7 # -----END PGP SIGNATURE----- # gpg: Signature made Thu 12 Dec 2024 09:20:35 AEST # gpg: using RSA key 6D207068EEDD65091C2CE2A3FA625F640EEB13CA # gpg: Good signature from "Rodrigo Vivi <rodrigo.vivi@intel.com>" [unknown] # gpg: aka "Rodrigo Vivi <rodrigo.vivi@gmail.com>" [unknown] # gpg: WARNING: This key is not certified with a trusted signature! # gpg: There is no indication that the signature belongs to the owner. # Primary key fingerprint: 6D20 7068 EEDD 6509 1C2C E2A3 FA62 5F64 0EEB 13CA From: Rodrigo Vivi <rodrigo.vivi@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/Z1ofx-fExLQKV_e4@intel.com
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94 files changed

Lines changed: 2461 additions & 588 deletions

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‎Documentation/gpu/xe/index.rst‎

Lines changed: 1 addition & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -23,4 +23,5 @@ DG2, etc is provided to prototype the driver.
2323
xe_firmware
2424
xe_tile
2525
xe_debugging
26+
xe_devcoredump
2627
xe-drm-usage-stats.rst

‎Documentation/gpu/xe/xe_devcoredump.rst‎

Lines changed: 14 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -0,0 +1,14 @@
1+
.. SPDX-License-Identifier: (GPL-2.0+ OR MIT)
2+
3+
==================
4+
Xe Device Coredump
5+
==================
6+
7+
.. kernel-doc:: drivers/gpu/drm/xe/xe_devcoredump.c
8+
:doc: Xe device coredump
9+
10+
Internal API
11+
============
12+
13+
.. kernel-doc:: drivers/gpu/drm/xe/xe_devcoredump.c
14+
:internal:

‎drivers/gpu/drm/i915/display/intel_cx0_phy_regs.h‎

Lines changed: 7 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -200,6 +200,13 @@
200200
#define XELPDP_SSC_ENABLE_PLLA REG_BIT(1)
201201
#define XELPDP_SSC_ENABLE_PLLB REG_BIT(0)
202202

203+
#define TCSS_DISP_MAILBOX_IN_CMD _MMIO(0x161300)
204+
#define TCSS_DISP_MAILBOX_IN_CMD_RUN_BUSY REG_BIT(31)
205+
#define TCSS_DISP_MAILBOX_IN_CMD_CMD_MASK REG_GENMASK(7, 0)
206+
#define TCSS_DISP_MAILBOX_IN_CMD_DATA(val) REG_FIELD_PREP(TCSS_DISP_MAILBOX_IN_CMD_CMD_MASK, val)
207+
208+
#define TCSS_DISP_MAILBOX_IN_DATA _MMIO(0x161304)
209+
203210
/* C10 Vendor Registers */
204211
#define PHY_C10_VDR_PLL(idx) (0xC00 + (idx))
205212
#define C10_PLL0_FRACEN REG_BIT8(4)

‎drivers/gpu/drm/i915/display/intel_tc.c‎

Lines changed: 35 additions & 4 deletions
Original file line numberDiff line numberDiff line change
@@ -1013,21 +1013,52 @@ xelpdp_tc_phy_wait_for_tcss_power(struct intel_tc_port *tc, bool enabled)
10131013
return true;
10141014
}
10151015

1016+
/*
1017+
* Gfx driver WA 14020908590 for PTL tcss_rxdetect_clkswb_req/ack
1018+
* handshake violation when pwwreq= 0->1 during TC7/10 entry
1019+
*/
1020+
static void xelpdp_tc_power_request_wa(struct intel_display *display, bool enable)
1021+
{
1022+
/* check if mailbox is running busy */
1023+
if (intel_de_wait_for_clear(display, TCSS_DISP_MAILBOX_IN_CMD,
1024+
TCSS_DISP_MAILBOX_IN_CMD_RUN_BUSY, 10)) {
1025+
drm_dbg_kms(display->drm,
1026+
"Timeout waiting for TCSS mailbox run/busy bit to clear\n");
1027+
return;
1028+
}
1029+
1030+
intel_de_write(display, TCSS_DISP_MAILBOX_IN_DATA, enable ? 1 : 0);
1031+
intel_de_write(display, TCSS_DISP_MAILBOX_IN_CMD,
1032+
TCSS_DISP_MAILBOX_IN_CMD_RUN_BUSY |
1033+
TCSS_DISP_MAILBOX_IN_CMD_DATA(0x1));
1034+
1035+
/* wait to clear mailbox running busy bit before continuing */
1036+
if (intel_de_wait_for_clear(display, TCSS_DISP_MAILBOX_IN_CMD,
1037+
TCSS_DISP_MAILBOX_IN_CMD_RUN_BUSY, 10)) {
1038+
drm_dbg_kms(display->drm,
1039+
"Timeout after writing data to mailbox. Mailbox run/busy bit did not clear\n");
1040+
return;
1041+
}
1042+
}
1043+
10161044
static void __xelpdp_tc_phy_enable_tcss_power(struct intel_tc_port *tc, bool enable)
10171045
{
1018-
struct drm_i915_private *i915 = tc_to_i915(tc);
1046+
struct intel_display *display = to_intel_display(tc->dig_port);
10191047
enum port port = tc->dig_port->base.port;
1020-
i915_reg_t reg = XELPDP_PORT_BUF_CTL1(i915, port);
1048+
i915_reg_t reg = XELPDP_PORT_BUF_CTL1(display, port);
10211049
u32 val;
10221050

10231051
assert_tc_cold_blocked(tc);
10241052

1025-
val = intel_de_read(i915, reg);
1053+
if (DISPLAY_VER(display) == 30)
1054+
xelpdp_tc_power_request_wa(display, enable);
1055+
1056+
val = intel_de_read(display, reg);
10261057
if (enable)
10271058
val |= XELPDP_TCSS_POWER_REQUEST;
10281059
else
10291060
val &= ~XELPDP_TCSS_POWER_REQUEST;
1030-
intel_de_write(i915, reg, val);
1061+
intel_de_write(display, reg, val);
10311062
}
10321063

10331064
static bool xelpdp_tc_phy_enable_tcss_power(struct intel_tc_port *tc, bool enable)

‎drivers/gpu/drm/ttm/ttm_bo_vm.c‎

Lines changed: 32 additions & 8 deletions
Original file line numberDiff line numberDiff line change
@@ -405,13 +405,25 @@ static int ttm_bo_vm_access_kmap(struct ttm_buffer_object *bo,
405405
return len;
406406
}
407407

408-
int ttm_bo_vm_access(struct vm_area_struct *vma, unsigned long addr,
409-
void *buf, int len, int write)
408+
/**
409+
* ttm_bo_access - Helper to access a buffer object
410+
*
411+
* @bo: ttm buffer object
412+
* @offset: access offset into buffer object
413+
* @buf: pointer to caller memory to read into or write from
414+
* @len: length of access
415+
* @write: write access
416+
*
417+
* Utility function to access a buffer object. Useful when buffer object cannot
418+
* be easily mapped (non-contiguous, non-visible, etc...). Should not directly
419+
* be exported to user space via a peak / poke interface.
420+
*
421+
* Returns:
422+
* @len if successful, negative error code on failure.
423+
*/
424+
int ttm_bo_access(struct ttm_buffer_object *bo, unsigned long offset,
425+
void *buf, int len, int write)
410426
{
411-
struct ttm_buffer_object *bo = vma->vm_private_data;
412-
unsigned long offset = (addr) - vma->vm_start +
413-
((vma->vm_pgoff - drm_vma_node_start(&bo->base.vma_node))
414-
<< PAGE_SHIFT);
415427
int ret;
416428

417429
if (len < 1 || (offset + len) > bo->base.size)
@@ -429,8 +441,8 @@ int ttm_bo_vm_access(struct vm_area_struct *vma, unsigned long addr,
429441
break;
430442
default:
431443
if (bo->bdev->funcs->access_memory)
432-
ret = bo->bdev->funcs->access_memory(
433-
bo, offset, buf, len, write);
444+
ret = bo->bdev->funcs->access_memory
445+
(bo, offset, buf, len, write);
434446
else
435447
ret = -EIO;
436448
}
@@ -439,6 +451,18 @@ int ttm_bo_vm_access(struct vm_area_struct *vma, unsigned long addr,
439451

440452
return ret;
441453
}
454+
EXPORT_SYMBOL(ttm_bo_access);
455+
456+
int ttm_bo_vm_access(struct vm_area_struct *vma, unsigned long addr,
457+
void *buf, int len, int write)
458+
{
459+
struct ttm_buffer_object *bo = vma->vm_private_data;
460+
unsigned long offset = (addr) - vma->vm_start +
461+
((vma->vm_pgoff - drm_vma_node_start(&bo->base.vma_node))
462+
<< PAGE_SHIFT);
463+
464+
return ttm_bo_access(bo, offset, buf, len, write);
465+
}
442466
EXPORT_SYMBOL(ttm_bo_vm_access);
443467

444468
static const struct vm_operations_struct ttm_bo_vm_ops = {

‎drivers/gpu/drm/xe/Makefile‎

Lines changed: 4 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -101,6 +101,7 @@ xe-y += xe_bb.o \
101101
xe_trace.o \
102102
xe_trace_bo.o \
103103
xe_trace_guc.o \
104+
xe_trace_lrc.o \
104105
xe_ttm_sys_mgr.o \
105106
xe_ttm_stolen_mgr.o \
106107
xe_ttm_vram_mgr.o \
@@ -110,6 +111,7 @@ xe-y += xe_bb.o \
110111
xe_vm.o \
111112
xe_vram.o \
112113
xe_vram_freq.o \
114+
xe_vsec.o \
113115
xe_wait_user_fence.o \
114116
xe_wa.o \
115117
xe_wopcm.o
@@ -124,7 +126,8 @@ xe-y += \
124126
xe_gt_sriov_vf.o \
125127
xe_guc_relay.o \
126128
xe_memirq.o \
127-
xe_sriov.o
129+
xe_sriov.o \
130+
xe_sriov_vf.o
128131

129132
xe-$(CONFIG_PCI_IOV) += \
130133
xe_gt_sriov_pf.o \

‎drivers/gpu/drm/xe/abi/guc_actions_abi.h‎

Lines changed: 20 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -134,6 +134,8 @@ enum xe_guc_action {
134134
XE_GUC_ACTION_DEREGISTER_CONTEXT = 0x4503,
135135
XE_GUC_ACTION_REGISTER_COMMAND_TRANSPORT_BUFFER = 0x4505,
136136
XE_GUC_ACTION_DEREGISTER_COMMAND_TRANSPORT_BUFFER = 0x4506,
137+
XE_GUC_ACTION_REGISTER_G2G = 0x4507,
138+
XE_GUC_ACTION_DEREGISTER_G2G = 0x4508,
137139
XE_GUC_ACTION_DEREGISTER_CONTEXT_DONE = 0x4600,
138140
XE_GUC_ACTION_REGISTER_CONTEXT_MULTI_LRC = 0x4601,
139141
XE_GUC_ACTION_CLIENT_SOFT_RESET = 0x5507,
@@ -218,4 +220,22 @@ enum xe_guc_tlb_inval_mode {
218220
XE_GUC_TLB_INVAL_MODE_LITE = 0x1,
219221
};
220222

223+
/*
224+
* GuC to GuC communication (de-)registration fields:
225+
*/
226+
enum xe_guc_g2g_type {
227+
XE_G2G_TYPE_IN = 0x0,
228+
XE_G2G_TYPE_OUT,
229+
XE_G2G_TYPE_LIMIT,
230+
};
231+
232+
#define XE_G2G_REGISTER_DEVICE REG_GENMASK(16, 16)
233+
#define XE_G2G_REGISTER_TILE REG_GENMASK(15, 12)
234+
#define XE_G2G_REGISTER_TYPE REG_GENMASK(11, 8)
235+
#define XE_G2G_REGISTER_SIZE REG_GENMASK(7, 0)
236+
237+
#define XE_G2G_DEREGISTER_DEVICE REG_GENMASK(16, 16)
238+
#define XE_G2G_DEREGISTER_TILE REG_GENMASK(15, 12)
239+
#define XE_G2G_DEREGISTER_TYPE REG_GENMASK(11, 8)
240+
221241
#endif

‎drivers/gpu/drm/xe/abi/guc_actions_sriov_abi.h‎

Lines changed: 38 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -501,6 +501,44 @@
501501
#define VF2GUC_VF_RESET_RESPONSE_MSG_LEN GUC_HXG_RESPONSE_MSG_MIN_LEN
502502
#define VF2GUC_VF_RESET_RESPONSE_MSG_0_MBZ GUC_HXG_RESPONSE_MSG_0_DATA0
503503

504+
/**
505+
* DOC: VF2GUC_NOTIFY_RESFIX_DONE
506+
*
507+
* This action is used by VF to notify the GuC that the VF KMD has completed
508+
* post-migration recovery steps.
509+
*
510+
* This message must be sent as `MMIO HXG Message`_.
511+
*
512+
* +---+-------+--------------------------------------------------------------+
513+
* | | Bits | Description |
514+
* +===+=======+==============================================================+
515+
* | 0 | 31 | ORIGIN = GUC_HXG_ORIGIN_HOST_ |
516+
* | +-------+--------------------------------------------------------------+
517+
* | | 30:28 | TYPE = GUC_HXG_TYPE_REQUEST_ |
518+
* | +-------+--------------------------------------------------------------+
519+
* | | 27:16 | DATA0 = MBZ |
520+
* | +-------+--------------------------------------------------------------+
521+
* | | 15:0 | ACTION = _`GUC_ACTION_VF2GUC_NOTIFY_RESFIX_DONE` = 0x5508 |
522+
* +---+-------+--------------------------------------------------------------+
523+
*
524+
* +---+-------+--------------------------------------------------------------+
525+
* | | Bits | Description |
526+
* +===+=======+==============================================================+
527+
* | 0 | 31 | ORIGIN = GUC_HXG_ORIGIN_GUC_ |
528+
* | +-------+--------------------------------------------------------------+
529+
* | | 30:28 | TYPE = GUC_HXG_TYPE_RESPONSE_SUCCESS_ |
530+
* | +-------+--------------------------------------------------------------+
531+
* | | 27:0 | DATA0 = MBZ |
532+
* +---+-------+--------------------------------------------------------------+
533+
*/
534+
#define GUC_ACTION_VF2GUC_NOTIFY_RESFIX_DONE 0x5508u
535+
536+
#define VF2GUC_NOTIFY_RESFIX_DONE_REQUEST_MSG_LEN GUC_HXG_REQUEST_MSG_MIN_LEN
537+
#define VF2GUC_NOTIFY_RESFIX_DONE_REQUEST_MSG_0_MBZ GUC_HXG_REQUEST_MSG_0_DATA0
538+
539+
#define VF2GUC_NOTIFY_RESFIX_DONE_RESPONSE_MSG_LEN GUC_HXG_RESPONSE_MSG_MIN_LEN
540+
#define VF2GUC_NOTIFY_RESFIX_DONE_RESPONSE_MSG_0_MBZ GUC_HXG_RESPONSE_MSG_0_DATA0
541+
504542
/**
505543
* DOC: VF2GUC_QUERY_SINGLE_KLV
506544
*

‎drivers/gpu/drm/xe/abi/guc_klvs_abi.h‎

Lines changed: 14 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -291,6 +291,14 @@ enum {
291291
*
292292
* :0: (default)
293293
* :1-65535: number of contexts (Gen12)
294+
*
295+
* _`GUC_KLV_VF_CFG_SCHED_PRIORITY` : 0x8A0C
296+
* This config controls VF’s scheduling priority.
297+
*
298+
* :0: LOW = schedule VF only if it has active work (default)
299+
* :1: NORMAL = schedule VF always, irrespective of whether it has work or not
300+
* :2: HIGH = schedule VF in the next time-slice after current active
301+
* time-slice completes if it has active work
294302
*/
295303

296304
#define GUC_KLV_VF_CFG_GGTT_START_KEY 0x0001
@@ -343,6 +351,12 @@ enum {
343351
#define GUC_KLV_VF_CFG_BEGIN_CONTEXT_ID_KEY 0x8a0b
344352
#define GUC_KLV_VF_CFG_BEGIN_CONTEXT_ID_LEN 1u
345353

354+
#define GUC_KLV_VF_CFG_SCHED_PRIORITY_KEY 0x8a0c
355+
#define GUC_KLV_VF_CFG_SCHED_PRIORITY_LEN 1u
356+
#define GUC_SCHED_PRIORITY_LOW 0u
357+
#define GUC_SCHED_PRIORITY_NORMAL 1u
358+
#define GUC_SCHED_PRIORITY_HIGH 2u
359+
346360
/*
347361
* Workaround keys:
348362
*/

‎drivers/gpu/drm/xe/display/ext/i915_irq.c‎

Lines changed: 1 addition & 12 deletions
Original file line numberDiff line numberDiff line change
@@ -53,18 +53,7 @@ void gen2_irq_init(struct intel_uncore *uncore, struct i915_irq_regs regs,
5353

5454
bool intel_irqs_enabled(struct xe_device *xe)
5555
{
56-
/*
57-
* XXX: i915 has a racy handling of the irq.enabled, since it doesn't
58-
* lock its transitions. Because of that, the irq.enabled sometimes
59-
* is not read with the irq.lock in place.
60-
* However, the most critical cases like vblank and page flips are
61-
* properly using the locks.
62-
* We cannot take the lock in here or run any kind of assert because
63-
* of i915 inconsistency.
64-
* But at this point the xe irq is better protected against races,
65-
* although the full solution would be protecting the i915 side.
66-
*/
67-
return xe->irq.enabled;
56+
return atomic_read(&xe->irq.enabled);
6857
}
6958

7059
void intel_synchronize_irq(struct xe_device *xe)

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