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Merge tag 'clk-imx-5.12' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux into clk-imx
Pull i.MX clk driver updates from Shawn Guo: - Use pr_notice() instead of pr_warn() on i.MX6Q pre-boot ldb_di_clk reparenting - A couple of W=1 build warning fixes from Lee Jones - A series from Liu Ying that adds some SCU clocks support for i.MX8qxp DC0/MIPI-LVDS subsystems - A series from Lucas Stach that adds PLL monitor clocks for i.MX8MQ, and clkout1/2 support for i.MX8MM/MN * tag 'clk-imx-5.12' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux: clk: imx: Move 'imx6sl_set_wait_clk()'s prototype out to accessible header clk: imx8mn: add clkout1/2 support clk: imx8mm: add clkout1/2 support clk: imx8mq: add PLL monitor output clk: imx: clk-imx31: Remove unused static const table 'uart_clks' clk: imx6q: demote warning about pre-boot ldb_di_clk reparenting clk: imx: clk-imx8qxp: Add some SCU clocks support for MIPI-LVDS subsystems clk: imx: clk-imx8qxp: Register DC0 display clocks with imx_clk_scu2() clk: imx: clk-imx8qxp: Add SCU clocks support for DC0 bypass clocks clk: imx: clk-imx8qxp: Add SCU clocks support for DC0 PLL clocks
2 parents 5c8fe58 + de5774d commit c148c1b

15 files changed

Lines changed: 125 additions & 19 deletions

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‎arch/arm/mach-imx/common.h‎

Lines changed: 0 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -85,7 +85,6 @@ void imx_anatop_pre_suspend(void);
8585
void imx_anatop_post_resume(void);
8686
int imx6_set_lpm(enum mxc_cpu_pwr_mode mode);
8787
void imx6_set_int_mem_clk_lpm(bool enable);
88-
void imx6sl_set_wait_clk(bool enter);
8988
int imx_mmdc_get_ddr_type(void);
9089
int imx7ulp_set_lpm(enum ulp_cpu_pwr_mode mode);
9190

‎arch/arm/mach-imx/cpuidle-imx6sl.c‎

Lines changed: 1 addition & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -3,6 +3,7 @@
33
* Copyright (C) 2014 Freescale Semiconductor, Inc.
44
*/
55

6+
#include <linux/clk/imx.h>
67
#include <linux/cpuidle.h>
78
#include <linux/module.h>
89
#include <asm/cpuidle.h>

‎arch/arm/mach-imx/pm-imx6.c‎

Lines changed: 1 addition & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -4,6 +4,7 @@
44
* Copyright 2011 Linaro Ltd.
55
*/
66

7+
#include <linux/clk/imx.h>
78
#include <linux/delay.h>
89
#include <linux/init.h>
910
#include <linux/io.h>

‎drivers/clk/imx/clk-imx31.c‎

Lines changed: 0 additions & 10 deletions
Original file line numberDiff line numberDiff line change
@@ -51,16 +51,6 @@ enum mx31_clks {
5151
static struct clk *clk[clk_max];
5252
static struct clk_onecell_data clk_data;
5353

54-
static struct clk ** const uart_clks[] __initconst = {
55-
&clk[ipg],
56-
&clk[uart1_gate],
57-
&clk[uart2_gate],
58-
&clk[uart3_gate],
59-
&clk[uart4_gate],
60-
&clk[uart5_gate],
61-
NULL
62-
};
63-
6454
static void __init _mx31_clocks_init(void __iomem *base, unsigned long fref)
6555
{
6656
clk[dummy] = imx_clk_fixed("dummy", 0);

‎drivers/clk/imx/clk-imx6q.c‎

Lines changed: 3 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -338,10 +338,10 @@ static void init_ldb_clks(struct device_node *np, void __iomem *ccm_base)
338338
of_assigned_ldb_sels(np, &sel[0][3], &sel[1][3]);
339339

340340
for (i = 0; i < 2; i++) {
341-
/* Warn if a glitch might have been introduced already */
341+
/* Print a notice if a glitch might have been introduced already */
342342
if (sel[i][0] != 3) {
343-
pr_warn("ccm: ldb_di%d_sel already changed from reset value: %d\n",
344-
i, sel[i][0]);
343+
pr_notice("ccm: possible glitch: ldb_di%d_sel already changed from reset value: %d\n",
344+
i, sel[i][0]);
345345
}
346346

347347
if (sel[i][0] == sel[i][3])

‎drivers/clk/imx/clk-imx6sl.c‎

Lines changed: 1 addition & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -6,6 +6,7 @@
66
#include <linux/bits.h>
77
#include <linux/clk.h>
88
#include <linux/clkdev.h>
9+
#include <linux/clk/imx.h>
910
#include <linux/err.h>
1011
#include <linux/of.h>
1112
#include <linux/of_address.h>

‎drivers/clk/imx/clk-imx8mm.c‎

Lines changed: 12 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -288,6 +288,11 @@ static const char *imx8mm_clko1_sels[] = {"osc_24m", "sys_pll1_800m", "dummy", "
288288
static const char *imx8mm_clko2_sels[] = {"osc_24m", "sys_pll2_200m", "sys_pll1_400m", "sys_pll2_166m",
289289
"sys_pll3_out", "audio_pll1_out", "video_pll1_out", "osc_32k", };
290290

291+
static const char * const clkout_sels[] = {"audio_pll1_out", "audio_pll2_out", "video_pll1_out",
292+
"dummy", "dummy", "gpu_pll_out", "vpu_pll_out",
293+
"arm_pll_out", "sys_pll1", "sys_pll2", "sys_pll3",
294+
"dummy", "dummy", "osc_24m", "dummy", "osc_32k"};
295+
291296
static struct clk_hw_onecell_data *clk_hw_data;
292297
static struct clk_hw **hws;
293298

@@ -410,6 +415,13 @@ static int imx8mm_clocks_probe(struct platform_device *pdev)
410415
hws[IMX8MM_SYS_PLL2_500M] = imx_clk_hw_fixed_factor("sys_pll2_500m", "sys_pll2_500m_cg", 1, 2);
411416
hws[IMX8MM_SYS_PLL2_1000M] = imx_clk_hw_fixed_factor("sys_pll2_1000m", "sys_pll2_out", 1, 1);
412417

418+
hws[IMX8MM_CLK_CLKOUT1_SEL] = imx_clk_hw_mux("clkout1_sel", base + 0x128, 4, 4, clkout_sels, ARRAY_SIZE(clkout_sels));
419+
hws[IMX8MM_CLK_CLKOUT1_DIV] = imx_clk_hw_divider("clkout1_div", "clkout1_sel", base + 0x128, 0, 4);
420+
hws[IMX8MM_CLK_CLKOUT1] = imx_clk_hw_gate("clkout1", "clkout1_div", base + 0x128, 8);
421+
hws[IMX8MM_CLK_CLKOUT2_SEL] = imx_clk_hw_mux("clkout2_sel", base + 0x128, 20, 4, clkout_sels, ARRAY_SIZE(clkout_sels));
422+
hws[IMX8MM_CLK_CLKOUT2_DIV] = imx_clk_hw_divider("clkout2_div", "clkout2_sel", base + 0x128, 16, 4);
423+
hws[IMX8MM_CLK_CLKOUT2] = imx_clk_hw_gate("clkout2", "clkout2_div", base + 0x128, 24);
424+
413425
np = dev->of_node;
414426
base = devm_platform_ioremap_resource(pdev, 0);
415427
if (WARN_ON(IS_ERR(base)))

‎drivers/clk/imx/clk-imx8mn.c‎

Lines changed: 12 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -281,6 +281,11 @@ static const char * const imx8mn_clko2_sels[] = {"osc_24m", "sys_pll2_200m", "sy
281281
"sys_pll2_166m", "sys_pll3_out", "audio_pll1_out",
282282
"video_pll1_out", "osc_32k", };
283283

284+
static const char * const clkout_sels[] = {"audio_pll1_out", "audio_pll2_out", "video_pll1_out",
285+
"dummy", "dummy", "gpu_pll_out", "dummy",
286+
"arm_pll_out", "sys_pll1", "sys_pll2", "sys_pll3",
287+
"dummy", "dummy", "osc_24m", "dummy", "osc_32k"};
288+
284289
static struct clk_hw_onecell_data *clk_hw_data;
285290
static struct clk_hw **hws;
286291

@@ -405,6 +410,13 @@ static int imx8mn_clocks_probe(struct platform_device *pdev)
405410
hws[IMX8MN_SYS_PLL2_500M] = imx_clk_hw_fixed_factor("sys_pll2_500m", "sys_pll2_500m_cg", 1, 2);
406411
hws[IMX8MN_SYS_PLL2_1000M] = imx_clk_hw_fixed_factor("sys_pll2_1000m", "sys_pll2_out", 1, 1);
407412

413+
hws[IMX8MN_CLK_CLKOUT1_SEL] = imx_clk_hw_mux("clkout1_sel", base + 0x128, 4, 4, clkout_sels, ARRAY_SIZE(clkout_sels));
414+
hws[IMX8MN_CLK_CLKOUT1_DIV] = imx_clk_hw_divider("clkout1_div", "clkout1_sel", base + 0x128, 0, 4);
415+
hws[IMX8MN_CLK_CLKOUT1] = imx_clk_hw_gate("clkout1", "clkout1_div", base + 0x128, 8);
416+
hws[IMX8MN_CLK_CLKOUT2_SEL] = imx_clk_hw_mux("clkout2_sel", base + 0x128, 20, 4, clkout_sels, ARRAY_SIZE(clkout_sels));
417+
hws[IMX8MN_CLK_CLKOUT2_DIV] = imx_clk_hw_divider("clkout2_div", "clkout2_sel", base + 0x128, 16, 4);
418+
hws[IMX8MN_CLK_CLKOUT2] = imx_clk_hw_gate("clkout2", "clkout2_div", base + 0x128, 24);
419+
408420
np = dev->of_node;
409421
base = devm_platform_ioremap_resource(pdev, 0);
410422
if (WARN_ON(IS_ERR(base))) {

‎drivers/clk/imx/clk-imx8mq.c‎

Lines changed: 22 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -270,6 +270,14 @@ static const char * const imx8mq_clko1_sels[] = {"osc_25m", "sys1_pll_800m", "os
270270
static const char * const imx8mq_clko2_sels[] = {"osc_25m", "sys2_pll_200m", "sys1_pll_400m", "sys2_pll_166m",
271271
"sys3_pll_out", "audio_pll1_out", "video_pll1_out", "ckil", };
272272

273+
static const char * const pllout_monitor_sels[] = {"osc_25m", "osc_27m", "dummy", "dummy", "ckil",
274+
"audio_pll1_out_monitor", "audio_pll2_out_monitor",
275+
"video_pll1_out_monitor", "gpu_pll_out_monitor",
276+
"vpu_pll_out_monitor", "arm_pll_out_monitor",
277+
"sys_pll1_out_monitor", "sys_pll2_out_monitor",
278+
"sys_pll3_out_monitor", "dram_pll_out_monitor",
279+
"video_pll2_out_monitor", };
280+
273281
static struct clk_hw_onecell_data *clk_hw_data;
274282
static struct clk_hw **hws;
275283

@@ -399,6 +407,20 @@ static int imx8mq_clocks_probe(struct platform_device *pdev)
399407
hws[IMX8MQ_SYS2_PLL_500M] = imx_clk_hw_fixed_factor("sys2_pll_500m", "sys2_pll_500m_cg", 1, 2);
400408
hws[IMX8MQ_SYS2_PLL_1000M] = imx_clk_hw_fixed_factor("sys2_pll_1000m", "sys2_pll_1000m_cg", 1, 1);
401409

410+
hws[IMX8MQ_CLK_MON_AUDIO_PLL1_DIV] = imx_clk_hw_divider("audio_pll1_out_monitor", "audio_pll1_bypass", base + 0x78, 0, 3);
411+
hws[IMX8MQ_CLK_MON_AUDIO_PLL2_DIV] = imx_clk_hw_divider("audio_pll2_out_monitor", "audio_pll2_bypass", base + 0x78, 4, 3);
412+
hws[IMX8MQ_CLK_MON_VIDEO_PLL1_DIV] = imx_clk_hw_divider("video_pll1_out_monitor", "video_pll1_bypass", base + 0x78, 8, 3);
413+
hws[IMX8MQ_CLK_MON_GPU_PLL_DIV] = imx_clk_hw_divider("gpu_pll_out_monitor", "gpu_pll_bypass", base + 0x78, 12, 3);
414+
hws[IMX8MQ_CLK_MON_VPU_PLL_DIV] = imx_clk_hw_divider("vpu_pll_out_monitor", "vpu_pll_bypass", base + 0x78, 16, 3);
415+
hws[IMX8MQ_CLK_MON_ARM_PLL_DIV] = imx_clk_hw_divider("arm_pll_out_monitor", "arm_pll_bypass", base + 0x78, 20, 3);
416+
hws[IMX8MQ_CLK_MON_SYS_PLL1_DIV] = imx_clk_hw_divider("sys_pll1_out_monitor", "sys1_pll_out", base + 0x7c, 0, 3);
417+
hws[IMX8MQ_CLK_MON_SYS_PLL2_DIV] = imx_clk_hw_divider("sys_pll2_out_monitor", "sys2_pll_out", base + 0x7c, 4, 3);
418+
hws[IMX8MQ_CLK_MON_SYS_PLL3_DIV] = imx_clk_hw_divider("sys_pll3_out_monitor", "sys3_pll_out", base + 0x7c, 8, 3);
419+
hws[IMX8MQ_CLK_MON_DRAM_PLL_DIV] = imx_clk_hw_divider("dram_pll_out_monitor", "dram_pll_out", base + 0x7c, 12, 3);
420+
hws[IMX8MQ_CLK_MON_VIDEO_PLL2_DIV] = imx_clk_hw_divider("video_pll2_out_monitor", "video2_pll_out", base + 0x7c, 16, 3);
421+
hws[IMX8MQ_CLK_MON_SEL] = imx_clk_hw_mux("pllout_monitor_sel", base + 0x74, 0, 4, pllout_monitor_sels, ARRAY_SIZE(pllout_monitor_sels));
422+
hws[IMX8MQ_CLK_MON_CLK2_OUT] = imx_clk_hw_gate("pllout_monitor_clk2", "pllout_monitor_sel", base + 0x74, 4);
423+
402424
np = dev->of_node;
403425
base = devm_platform_ioremap_resource(pdev, 0);
404426
if (WARN_ON(IS_ERR(base)))

‎drivers/clk/imx/clk-imx8qxp.c‎

Lines changed: 24 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -17,6 +17,14 @@
1717
#include <dt-bindings/clock/imx8-clock.h>
1818
#include <dt-bindings/firmware/imx/rsrc.h>
1919

20+
static const char *dc0_sels[] = {
21+
"clk_dummy",
22+
"clk_dummy",
23+
"dc0_pll0_clk",
24+
"dc0_pll1_clk",
25+
"dc0_bypass0_clk",
26+
};
27+
2028
static int imx8qxp_clk_probe(struct platform_device *pdev)
2129
{
2230
struct device_node *ccm_node = pdev->dev.of_node;
@@ -115,12 +123,26 @@ static int imx8qxp_clk_probe(struct platform_device *pdev)
115123
clks[IMX_CONN_USB2_LPM_CLK] = imx_clk_scu("usb3_lpm_div", IMX_SC_R_USB_2, IMX_SC_PM_CLK_MISC, clk_cells);
116124

117125
/* Display controller SS */
118-
clks[IMX_DC0_DISP0_CLK] = imx_clk_scu("dc0_disp0_clk", IMX_SC_R_DC_0, IMX_SC_PM_CLK_MISC0, clk_cells);
119-
clks[IMX_DC0_DISP1_CLK] = imx_clk_scu("dc0_disp1_clk", IMX_SC_R_DC_0, IMX_SC_PM_CLK_MISC1, clk_cells);
126+
clks[IMX_DC0_DISP0_CLK] = imx_clk_scu2("dc0_disp0_clk", dc0_sels, ARRAY_SIZE(dc0_sels), IMX_SC_R_DC_0, IMX_SC_PM_CLK_MISC0, clk_cells);
127+
clks[IMX_DC0_DISP1_CLK] = imx_clk_scu2("dc0_disp1_clk", dc0_sels, ARRAY_SIZE(dc0_sels), IMX_SC_R_DC_0, IMX_SC_PM_CLK_MISC1, clk_cells);
128+
clks[IMX_DC0_PLL0_CLK] = imx_clk_scu("dc0_pll0_clk", IMX_SC_R_DC_0_PLL_0, IMX_SC_PM_CLK_PLL, clk_cells);
129+
clks[IMX_DC0_PLL1_CLK] = imx_clk_scu("dc0_pll1_clk", IMX_SC_R_DC_0_PLL_1, IMX_SC_PM_CLK_PLL, clk_cells);
130+
clks[IMX_DC0_BYPASS0_CLK] = imx_clk_scu("dc0_bypass0_clk", IMX_SC_R_DC_0_VIDEO0, IMX_SC_PM_CLK_BYPASS, clk_cells);
131+
clks[IMX_DC0_BYPASS1_CLK] = imx_clk_scu("dc0_bypass1_clk", IMX_SC_R_DC_0_VIDEO1, IMX_SC_PM_CLK_BYPASS, clk_cells);
120132

121133
/* MIPI-LVDS SS */
134+
clks[IMX_MIPI0_LVDS_PIXEL_CLK] = imx_clk_scu("mipi0_lvds_pixel_clk", IMX_SC_R_LVDS_0, IMX_SC_PM_CLK_MISC2, clk_cells);
135+
clks[IMX_MIPI0_LVDS_BYPASS_CLK] = imx_clk_scu("mipi0_lvds_bypass_clk", IMX_SC_R_LVDS_0, IMX_SC_PM_CLK_BYPASS, clk_cells);
136+
clks[IMX_MIPI0_LVDS_PHY_CLK] = imx_clk_scu("mipi0_lvds_phy_clk", IMX_SC_R_LVDS_0, IMX_SC_PM_CLK_MISC3, clk_cells);
122137
clks[IMX_MIPI0_I2C0_CLK] = imx_clk_scu("mipi0_i2c0_clk", IMX_SC_R_MIPI_0_I2C_0, IMX_SC_PM_CLK_MISC2, clk_cells);
123138
clks[IMX_MIPI0_I2C1_CLK] = imx_clk_scu("mipi0_i2c1_clk", IMX_SC_R_MIPI_0_I2C_1, IMX_SC_PM_CLK_MISC2, clk_cells);
139+
clks[IMX_MIPI0_PWM0_CLK] = imx_clk_scu("mipi0_pwm0_clk", IMX_SC_R_MIPI_0_PWM_0, IMX_SC_PM_CLK_PER, clk_cells);
140+
clks[IMX_MIPI1_LVDS_PIXEL_CLK] = imx_clk_scu("mipi1_lvds_pixel_clk", IMX_SC_R_LVDS_1, IMX_SC_PM_CLK_MISC2, clk_cells);
141+
clks[IMX_MIPI1_LVDS_BYPASS_CLK] = imx_clk_scu("mipi1_lvds_bypass_clk", IMX_SC_R_LVDS_1, IMX_SC_PM_CLK_BYPASS, clk_cells);
142+
clks[IMX_MIPI1_LVDS_PHY_CLK] = imx_clk_scu("mipi1_lvds_phy_clk", IMX_SC_R_LVDS_1, IMX_SC_PM_CLK_MISC3, clk_cells);
143+
clks[IMX_MIPI1_I2C0_CLK] = imx_clk_scu("mipi1_i2c0_clk", IMX_SC_R_MIPI_1_I2C_0, IMX_SC_PM_CLK_MISC2, clk_cells);
144+
clks[IMX_MIPI1_I2C1_CLK] = imx_clk_scu("mipi1_i2c1_clk", IMX_SC_R_MIPI_1_I2C_1, IMX_SC_PM_CLK_MISC2, clk_cells);
145+
clks[IMX_MIPI1_PWM0_CLK] = imx_clk_scu("mipi1_pwm0_clk", IMX_SC_R_MIPI_1_PWM_0, IMX_SC_PM_CLK_PER, clk_cells);
124146

125147
/* MIPI CSI SS */
126148
clks[IMX_CSI0_CORE_CLK] = imx_clk_scu("mipi_csi0_core_clk", IMX_SC_R_CSI_0, IMX_SC_PM_CLK_PER, clk_cells);

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