Skip to content

Commit c253bf7

Browse files
arndbarndb
committed
Merge tag 'soc-fsl-fix-v5.17' of git://git.kernel.org/pub/scm/linux/kernel/git/leo/linux into arm/fixes
NXP/FSL SoC driver fixes for v5.17 - Add missing SoC compatible in existing binding - Replace kernel.h with the necessary inclusions - MAINTAINERS file fixes - Fix memory allocation failure check in guts driver - Various cleanups and minor fixes * tag 'soc-fsl-fix-v5.17' of git://git.kernel.org/pub/scm/linux/kernel/git/leo/linux: soc: fsl: qe: Check of ioremap return value soc: fsl: qe: fix typo in a comment soc: fsl: guts: Add a missing memory allocation failure check soc: fsl: guts: Revert commit 3c0d64e soc: fsl: Correct MAINTAINERS database (SOC) soc: fsl: Correct MAINTAINERS database (QUICC ENGINE LIBRARY) soc: fsl: Replace kernel.h with the necessary inclusions dt-bindings: fsl,layerscape-dcfg: add missing compatible for lx2160a dt-bindings: qoriq-clock: add missing compatible for lx2160a Link: https://lore.kernel.org/r/20220219012208.21835-1-leoyang.li@nxp.com Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2 parents f03f10a + a222fd8 commit c253bf7

11 files changed

Lines changed: 26 additions & 15 deletions

File tree

‎Documentation/devicetree/bindings/arm/freescale/fsl,layerscape-dcfg.txt‎

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -8,7 +8,7 @@ Required properties:
88
- compatible: Should contain a chip-specific compatible string,
99
Chip-specific strings are of the form "fsl,<chip>-dcfg",
1010
The following <chip>s are known to be supported:
11-
ls1012a, ls1021a, ls1043a, ls1046a, ls2080a.
11+
ls1012a, ls1021a, ls1043a, ls1046a, ls2080a, lx2160a
1212

1313
- reg : should contain base address and length of DCFG memory-mapped registers
1414

‎Documentation/devicetree/bindings/clock/qoriq-clock.txt‎

Lines changed: 1 addition & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -44,6 +44,7 @@ Required properties:
4444
* "fsl,ls1046a-clockgen"
4545
* "fsl,ls1088a-clockgen"
4646
* "fsl,ls2080a-clockgen"
47+
* "fsl,lx2160a-clockgen"
4748
Chassis-version clock strings include:
4849
* "fsl,qoriq-clockgen-1.0": for chassis 1.0 clocks
4950
* "fsl,qoriq-clockgen-2.0": for chassis 2.0 clocks

‎MAINTAINERS‎

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -7750,8 +7750,7 @@ M: Qiang Zhao <qiang.zhao@nxp.com>
77507750
L: linuxppc-dev@lists.ozlabs.org
77517751
S: Maintained
77527752
F: drivers/soc/fsl/qe/
7753-
F: include/soc/fsl/*qe*.h
7754-
F: include/soc/fsl/*ucc*.h
7753+
F: include/soc/fsl/qe/
77557754

77567755
FREESCALE QUICC ENGINE UCC ETHERNET DRIVER
77577756
M: Li Yang <leoyang.li@nxp.com>
@@ -7782,6 +7781,7 @@ F: Documentation/devicetree/bindings/misc/fsl,dpaa2-console.yaml
77827781
F: Documentation/devicetree/bindings/soc/fsl/
77837782
F: drivers/soc/fsl/
77847783
F: include/linux/fsl/
7784+
F: include/soc/fsl/
77857785

77867786
FREESCALE SOC FS_ENET DRIVER
77877787
M: Pantelis Antoniou <pantelis.antoniou@gmail.com>

‎drivers/soc/fsl/guts.c‎

Lines changed: 9 additions & 5 deletions
Original file line numberDiff line numberDiff line change
@@ -28,7 +28,6 @@ struct fsl_soc_die_attr {
2828
static struct guts *guts;
2929
static struct soc_device_attribute soc_dev_attr;
3030
static struct soc_device *soc_dev;
31-
static struct device_node *root;
3231

3332

3433
/* SoC die attribute definition for QorIQ platform */
@@ -138,7 +137,7 @@ static u32 fsl_guts_get_svr(void)
138137

139138
static int fsl_guts_probe(struct platform_device *pdev)
140139
{
141-
struct device_node *np = pdev->dev.of_node;
140+
struct device_node *root, *np = pdev->dev.of_node;
142141
struct device *dev = &pdev->dev;
143142
const struct fsl_soc_die_attr *soc_die;
144143
const char *machine;
@@ -159,8 +158,14 @@ static int fsl_guts_probe(struct platform_device *pdev)
159158
root = of_find_node_by_path("/");
160159
if (of_property_read_string(root, "model", &machine))
161160
of_property_read_string_index(root, "compatible", 0, &machine);
162-
if (machine)
163-
soc_dev_attr.machine = machine;
161+
if (machine) {
162+
soc_dev_attr.machine = devm_kstrdup(dev, machine, GFP_KERNEL);
163+
if (!soc_dev_attr.machine) {
164+
of_node_put(root);
165+
return -ENOMEM;
166+
}
167+
}
168+
of_node_put(root);
164169

165170
svr = fsl_guts_get_svr();
166171
soc_die = fsl_soc_die_match(svr, fsl_soc_die);
@@ -195,7 +200,6 @@ static int fsl_guts_probe(struct platform_device *pdev)
195200
static int fsl_guts_remove(struct platform_device *dev)
196201
{
197202
soc_device_unregister(soc_dev);
198-
of_node_put(root);
199203
return 0;
200204
}
201205

‎drivers/soc/fsl/qe/qe.c‎

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -147,7 +147,7 @@ EXPORT_SYMBOL(qe_issue_cmd);
147147
* memory mapped space.
148148
* The BRG clock is the QE clock divided by 2.
149149
* It was set up long ago during the initial boot phase and is
150-
* is given to us.
150+
* given to us.
151151
* Baud rate clocks are zero-based in the driver code (as that maps
152152
* to port numbers). Documentation uses 1-based numbering.
153153
*/
@@ -421,7 +421,7 @@ static void qe_upload_microcode(const void *base,
421421

422422
for (i = 0; i < be32_to_cpu(ucode->count); i++)
423423
iowrite32be(be32_to_cpu(code[i]), &qe_immr->iram.idata);
424-
424+
425425
/* Set I-RAM Ready Register */
426426
iowrite32be(QE_IRAM_READY, &qe_immr->iram.iready);
427427
}

‎drivers/soc/fsl/qe/qe_io.c‎

Lines changed: 2 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -35,6 +35,8 @@ int par_io_init(struct device_node *np)
3535
if (ret)
3636
return ret;
3737
par_io = ioremap(res.start, resource_size(&res));
38+
if (!par_io)
39+
return -ENOMEM;
3840

3941
if (!of_property_read_u32(np, "num-ports", &num_ports))
4042
num_par_io_ports = num_ports;

‎include/soc/fsl/dpaa2-fd.h‎

Lines changed: 2 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -7,7 +7,8 @@
77
#ifndef __FSL_DPAA2_FD_H
88
#define __FSL_DPAA2_FD_H
99

10-
#include <linux/kernel.h>
10+
#include <linux/byteorder/generic.h>
11+
#include <linux/types.h>
1112

1213
/**
1314
* DOC: DPAA2 FD - Frame Descriptor APIs for DPAA2

‎include/soc/fsl/qe/immap_qe.h‎

Lines changed: 2 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -13,7 +13,8 @@
1313
#define _ASM_POWERPC_IMMAP_QE_H
1414
#ifdef __KERNEL__
1515

16-
#include <linux/kernel.h>
16+
#include <linux/types.h>
17+
1718
#include <asm/io.h>
1819

1920
#define QE_IMMAP_SIZE (1024 * 1024) /* 1MB from 1MB+IMMR */

‎include/soc/fsl/qe/qe_tdm.h‎

Lines changed: 3 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -10,15 +10,17 @@
1010
#ifndef _QE_TDM_H_
1111
#define _QE_TDM_H_
1212

13-
#include <linux/kernel.h>
1413
#include <linux/list.h>
14+
#include <linux/types.h>
1515

1616
#include <soc/fsl/qe/immap_qe.h>
1717
#include <soc/fsl/qe/qe.h>
1818

1919
#include <soc/fsl/qe/ucc.h>
2020
#include <soc/fsl/qe/ucc_fast.h>
2121

22+
struct device_node;
23+
2224
/* SI RAM entries */
2325
#define SIR_LAST 0x0001
2426
#define SIR_BYTE 0x0002

‎include/soc/fsl/qe/ucc_fast.h‎

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -10,7 +10,7 @@
1010
#ifndef __UCC_FAST_H__
1111
#define __UCC_FAST_H__
1212

13-
#include <linux/kernel.h>
13+
#include <linux/types.h>
1414

1515
#include <soc/fsl/qe/immap_qe.h>
1616
#include <soc/fsl/qe/qe.h>

0 commit comments

Comments
 (0)