@@ -47,7 +47,7 @@ static void fsl_edma_enable_request(struct fsl_edma_chan *fsl_chan)
4747 struct edma_regs * regs = & fsl_chan -> edma -> regs ;
4848 u32 ch = fsl_chan -> vchan .chan .chan_id ;
4949
50- if (fsl_chan -> edma -> drvdata -> version == v1 ) {
50+ if (fsl_chan -> edma -> drvdata -> flags & FSL_EDMA_DRV_WRAP_IO ) {
5151 edma_writeb (fsl_chan -> edma , EDMA_SEEI_SEEI (ch ), regs -> seei );
5252 edma_writeb (fsl_chan -> edma , ch , regs -> serq );
5353 } else {
@@ -64,7 +64,7 @@ void fsl_edma_disable_request(struct fsl_edma_chan *fsl_chan)
6464 struct edma_regs * regs = & fsl_chan -> edma -> regs ;
6565 u32 ch = fsl_chan -> vchan .chan .chan_id ;
6666
67- if (fsl_chan -> edma -> drvdata -> version == v1 ) {
67+ if (fsl_chan -> edma -> drvdata -> flags & FSL_EDMA_DRV_WRAP_IO ) {
6868 edma_writeb (fsl_chan -> edma , ch , regs -> cerq );
6969 edma_writeb (fsl_chan -> edma , EDMA_CEEI_CEEI (ch ), regs -> ceei );
7070 } else {
@@ -120,7 +120,7 @@ void fsl_edma_chan_mux(struct fsl_edma_chan *fsl_chan,
120120 muxaddr = fsl_chan -> edma -> muxbase [ch / chans_per_mux ];
121121 slot = EDMAMUX_CHCFG_SOURCE (slot );
122122
123- if (fsl_chan -> edma -> drvdata -> version == v3 )
123+ if (fsl_chan -> edma -> drvdata -> flags & FSL_EDMA_DRV_CONFIG32 )
124124 mux_configure32 (fsl_chan , muxaddr , ch_off , slot , enable );
125125 else
126126 mux_configure8 (fsl_chan , muxaddr , ch_off , slot , enable );
@@ -682,43 +682,34 @@ void fsl_edma_cleanup_vchan(struct dma_device *dmadev)
682682}
683683
684684/*
685- * On the 32 channels Vybrid/mpc577x edma version (here called "v1"),
686- * register offsets are different compared to ColdFire mcf5441x 64 channels
687- * edma (here called "v2").
685+ * On the 32 channels Vybrid/mpc577x edma version, register offsets are
686+ * different compared to ColdFire mcf5441x 64 channels edma.
688687 *
689688 * This function sets up register offsets as per proper declared version
690689 * so must be called in xxx_edma_probe() just after setting the
691690 * edma "version" and "membase" appropriately.
692691 */
693692void fsl_edma_setup_regs (struct fsl_edma_engine * edma )
694693{
694+ bool is64 = !!(edma -> drvdata -> flags & FSL_EDMA_DRV_EDMA64 );
695+
695696 edma -> regs .cr = edma -> membase + EDMA_CR ;
696697 edma -> regs .es = edma -> membase + EDMA_ES ;
697698 edma -> regs .erql = edma -> membase + EDMA_ERQ ;
698699 edma -> regs .eeil = edma -> membase + EDMA_EEI ;
699700
700- edma -> regs .serq = edma -> membase + ((edma -> drvdata -> version == v2 ) ?
701- EDMA64_SERQ : EDMA_SERQ );
702- edma -> regs .cerq = edma -> membase + ((edma -> drvdata -> version == v2 ) ?
703- EDMA64_CERQ : EDMA_CERQ );
704- edma -> regs .seei = edma -> membase + ((edma -> drvdata -> version == v2 ) ?
705- EDMA64_SEEI : EDMA_SEEI );
706- edma -> regs .ceei = edma -> membase + ((edma -> drvdata -> version == v2 ) ?
707- EDMA64_CEEI : EDMA_CEEI );
708- edma -> regs .cint = edma -> membase + ((edma -> drvdata -> version == v2 ) ?
709- EDMA64_CINT : EDMA_CINT );
710- edma -> regs .cerr = edma -> membase + ((edma -> drvdata -> version == v2 ) ?
711- EDMA64_CERR : EDMA_CERR );
712- edma -> regs .ssrt = edma -> membase + ((edma -> drvdata -> version == v2 ) ?
713- EDMA64_SSRT : EDMA_SSRT );
714- edma -> regs .cdne = edma -> membase + ((edma -> drvdata -> version == v2 ) ?
715- EDMA64_CDNE : EDMA_CDNE );
716- edma -> regs .intl = edma -> membase + ((edma -> drvdata -> version == v2 ) ?
717- EDMA64_INTL : EDMA_INTR );
718- edma -> regs .errl = edma -> membase + ((edma -> drvdata -> version == v2 ) ?
719- EDMA64_ERRL : EDMA_ERR );
720-
721- if (edma -> drvdata -> version == v2 ) {
701+ edma -> regs .serq = edma -> membase + (is64 ? EDMA64_SERQ : EDMA_SERQ );
702+ edma -> regs .cerq = edma -> membase + (is64 ? EDMA64_CERQ : EDMA_CERQ );
703+ edma -> regs .seei = edma -> membase + (is64 ? EDMA64_SEEI : EDMA_SEEI );
704+ edma -> regs .ceei = edma -> membase + (is64 ? EDMA64_CEEI : EDMA_CEEI );
705+ edma -> regs .cint = edma -> membase + (is64 ? EDMA64_CINT : EDMA_CINT );
706+ edma -> regs .cerr = edma -> membase + (is64 ? EDMA64_CERR : EDMA_CERR );
707+ edma -> regs .ssrt = edma -> membase + (is64 ? EDMA64_SSRT : EDMA_SSRT );
708+ edma -> regs .cdne = edma -> membase + (is64 ? EDMA64_CDNE : EDMA_CDNE );
709+ edma -> regs .intl = edma -> membase + (is64 ? EDMA64_INTL : EDMA_INTR );
710+ edma -> regs .errl = edma -> membase + (is64 ? EDMA64_ERRL : EDMA_ERR );
711+
712+ if (is64 ) {
722713 edma -> regs .erqh = edma -> membase + EDMA64_ERQH ;
723714 edma -> regs .eeih = edma -> membase + EDMA64_EEIH ;
724715 edma -> regs .errh = edma -> membase + EDMA64_ERRH ;
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