Skip to content

Commit c567bc5

Browse files
Icenowypdp7
Icenowy
authored and
pdp7
committed
clk: thead: th1520-ap: set all AXI clocks to CLK_IS_CRITICAL
The AXI crossbar of TH1520 has no proper timeout handling, which means gating AXI clocks can easily lead to bus timeout and thus system hang. Set all AXI clock gates to CLK_IS_CRITICAL. All these clock gates are ungated by default on system reset. In addition, convert all current CLK_IGNORE_UNUSED usage to CLK_IS_CRITICAL to prevent unwanted clock gating. Signed-off-by: Icenowy Zheng <uwu@icenowy.me> Reviewed-by: Drew Fustini <fustini@kernel.org> Signed-off-by: Drew Fustini <fustini@kernel.org>
1 parent 8fede7f commit c567bc5

1 file changed

Lines changed: 22 additions & 22 deletions

File tree

‎drivers/clk/thead/clk-th1520-ap.c‎

Lines changed: 22 additions & 22 deletions
Original file line numberDiff line numberDiff line change
@@ -559,7 +559,7 @@ static struct ccu_div axi4_cpusys2_aclk = {
559559
.hw.init = CLK_HW_INIT_PARENTS_HW("axi4-cpusys2-aclk",
560560
gmac_pll_clk_parent,
561561
&ccu_div_ops,
562-
0),
562+
CLK_IS_CRITICAL),
563563
},
564564
};
565565

@@ -581,7 +581,7 @@ static struct ccu_div axi_aclk = {
581581
.hw.init = CLK_HW_INIT_PARENTS_DATA("axi-aclk",
582582
axi_parents,
583583
&ccu_div_ops,
584-
0),
584+
CLK_IS_CRITICAL),
585585
},
586586
};
587587

@@ -730,7 +730,7 @@ static struct ccu_div apb_pclk = {
730730
.hw.init = CLK_HW_INIT_PARENTS_DATA("apb-pclk",
731731
apb_parents,
732732
&ccu_div_ops,
733-
CLK_IGNORE_UNUSED),
733+
CLK_IS_CRITICAL),
734734
},
735735
};
736736

@@ -761,7 +761,7 @@ static struct ccu_div vi_clk = {
761761
.hw.init = CLK_HW_INIT_PARENTS_HW("vi",
762762
video_pll_clk_parent,
763763
&ccu_div_ops,
764-
0),
764+
CLK_IS_CRITICAL),
765765
},
766766
};
767767

@@ -786,7 +786,7 @@ static struct ccu_div vo_axi_clk = {
786786
.hw.init = CLK_HW_INIT_PARENTS_HW("vo-axi",
787787
video_pll_clk_parent,
788788
&ccu_div_ops,
789-
0),
789+
CLK_IS_CRITICAL),
790790
},
791791
};
792792

@@ -811,7 +811,7 @@ static struct ccu_div vp_axi_clk = {
811811
.hw.init = CLK_HW_INIT_PARENTS_HW("vp-axi",
812812
video_pll_clk_parent,
813813
&ccu_div_ops,
814-
CLK_IGNORE_UNUSED),
814+
CLK_IS_CRITICAL),
815815
},
816816
};
817817

@@ -872,27 +872,27 @@ static const struct clk_parent_data emmc_sdio_ref_clk_pd[] = {
872872
static CCU_GATE(CLK_BROM, brom_clk, "brom", ahb2_cpusys_hclk_pd, 0x100, 4, 0);
873873
static CCU_GATE(CLK_BMU, bmu_clk, "bmu", axi4_cpusys2_aclk_pd, 0x100, 5, 0);
874874
static CCU_GATE(CLK_AON2CPU_A2X, aon2cpu_a2x_clk, "aon2cpu-a2x", axi4_cpusys2_aclk_pd,
875-
0x134, 8, 0);
875+
0x134, 8, CLK_IS_CRITICAL);
876876
static CCU_GATE(CLK_X2X_CPUSYS, x2x_cpusys_clk, "x2x-cpusys", axi4_cpusys2_aclk_pd,
877-
0x134, 7, 0);
877+
0x134, 7, CLK_IS_CRITICAL);
878878
static CCU_GATE(CLK_CPU2AON_X2H, cpu2aon_x2h_clk, "cpu2aon-x2h", axi_aclk_pd,
879-
0x138, 8, CLK_IGNORE_UNUSED);
879+
0x138, 8, CLK_IS_CRITICAL);
880880
static CCU_GATE(CLK_CPU2PERI_X2H, cpu2peri_x2h_clk, "cpu2peri-x2h", axi4_cpusys2_aclk_pd,
881-
0x140, 9, CLK_IGNORE_UNUSED);
881+
0x140, 9, CLK_IS_CRITICAL);
882882
static CCU_GATE(CLK_PERISYS_APB1_HCLK, perisys_apb1_hclk, "perisys-apb1-hclk", perisys_ahb_hclk_pd,
883-
0x150, 9, CLK_IGNORE_UNUSED);
883+
0x150, 9, CLK_IS_CRITICAL);
884884
static CCU_GATE(CLK_PERISYS_APB2_HCLK, perisys_apb2_hclk, "perisys-apb2-hclk", perisys_ahb_hclk_pd,
885-
0x150, 10, CLK_IGNORE_UNUSED);
885+
0x150, 10, CLK_IS_CRITICAL);
886886
static CCU_GATE(CLK_PERISYS_APB3_HCLK, perisys_apb3_hclk, "perisys-apb3-hclk", perisys_ahb_hclk_pd,
887-
0x150, 11, CLK_IGNORE_UNUSED);
887+
0x150, 11, CLK_IS_CRITICAL);
888888
static CCU_GATE(CLK_PERISYS_APB4_HCLK, perisys_apb4_hclk, "perisys-apb4-hclk", perisys_ahb_hclk_pd,
889889
0x150, 12, 0);
890890
static const struct clk_parent_data perisys_apb4_hclk_pd[] = {
891891
{ .hw = &perisys_apb4_hclk.gate.hw },
892892
};
893893

894-
static CCU_GATE(CLK_NPU_AXI, npu_axi_clk, "npu-axi", axi_aclk_pd, 0x1c8, 5, 0);
895-
static CCU_GATE(CLK_CPU2VP, cpu2vp_clk, "cpu2vp", axi_aclk_pd, 0x1e0, 13, 0);
894+
static CCU_GATE(CLK_NPU_AXI, npu_axi_clk, "npu-axi", axi_aclk_pd, 0x1c8, 5, CLK_IS_CRITICAL);
895+
static CCU_GATE(CLK_CPU2VP, cpu2vp_clk, "cpu2vp", axi_aclk_pd, 0x1e0, 13, CLK_IS_CRITICAL);
896896
static CCU_GATE(CLK_EMMC_SDIO, emmc_sdio_clk, "emmc-sdio", emmc_sdio_ref_clk_pd, 0x204, 30, 0);
897897
static CCU_GATE(CLK_GMAC1, gmac1_clk, "gmac1", gmac_pll_clk_pd, 0x204, 26, 0);
898898
static CCU_GATE(CLK_PADCTRL1, padctrl1_clk, "padctrl1", perisys_apb_pclk_pd, 0x204, 24, 0);
@@ -936,11 +936,11 @@ static CCU_GATE(CLK_SRAM2, sram2_clk, "sram2", axi_aclk_pd, 0x20c, 2, 0);
936936
static CCU_GATE(CLK_SRAM3, sram3_clk, "sram3", axi_aclk_pd, 0x20c, 1, 0);
937937

938938
static CCU_GATE(CLK_AXI4_VO_ACLK, axi4_vo_aclk, "axi4-vo-aclk",
939-
video_pll_clk_pd, 0x0, 0, 0);
939+
video_pll_clk_pd, 0x0, 0, CLK_IS_CRITICAL);
940940
static CCU_GATE(CLK_GPU_CORE, gpu_core_clk, "gpu-core-clk", video_pll_clk_pd,
941941
0x0, 3, 0);
942942
static CCU_GATE(CLK_GPU_CFG_ACLK, gpu_cfg_aclk, "gpu-cfg-aclk",
943-
video_pll_clk_pd, 0x0, 4, 0);
943+
video_pll_clk_pd, 0x0, 4, CLK_IS_CRITICAL);
944944
static CCU_GATE(CLK_DPU_PIXELCLK0, dpu0_pixelclk, "dpu0-pixelclk",
945945
dpu0_clk_pd, 0x0, 5, CLK_SET_RATE_PARENT);
946946
static CCU_GATE(CLK_DPU_PIXELCLK1, dpu1_pixelclk, "dpu1-pixelclk",
@@ -972,9 +972,9 @@ static CCU_GATE(CLK_MIPI_DSI1_REFCLK, mipi_dsi1_refclk, "mipi-dsi1-refclk",
972972
static CCU_GATE(CLK_HDMI_I2S, hdmi_i2s_clk, "hdmi-i2s-clk", video_pll_clk_pd,
973973
0x0, 19, 0);
974974
static CCU_GATE(CLK_X2H_DPU1_ACLK, x2h_dpu1_aclk, "x2h-dpu1-aclk",
975-
video_pll_clk_pd, 0x0, 20, 0);
975+
video_pll_clk_pd, 0x0, 20, CLK_IS_CRITICAL);
976976
static CCU_GATE(CLK_X2H_DPU_ACLK, x2h_dpu_aclk, "x2h-dpu-aclk",
977-
video_pll_clk_pd, 0x0, 21, 0);
977+
video_pll_clk_pd, 0x0, 21, CLK_IS_CRITICAL);
978978
static CCU_GATE(CLK_AXI4_VO_PCLK, axi4_vo_pclk, "axi4-vo-pclk",
979979
video_pll_clk_pd, 0x0, 22, 0);
980980
static CCU_GATE(CLK_IOPMP_VOSYS_DPU_PCLK, iopmp_vosys_dpu_pclk,
@@ -984,11 +984,11 @@ static CCU_GATE(CLK_IOPMP_VOSYS_DPU1_PCLK, iopmp_vosys_dpu1_pclk,
984984
static CCU_GATE(CLK_IOPMP_VOSYS_GPU_PCLK, iopmp_vosys_gpu_pclk,
985985
"iopmp-vosys-gpu-pclk", video_pll_clk_pd, 0x0, 25, 0);
986986
static CCU_GATE(CLK_IOPMP_DPU1_ACLK, iopmp_dpu1_aclk, "iopmp-dpu1-aclk",
987-
video_pll_clk_pd, 0x0, 27, 0);
987+
video_pll_clk_pd, 0x0, 27, CLK_IS_CRITICAL);
988988
static CCU_GATE(CLK_IOPMP_DPU_ACLK, iopmp_dpu_aclk, "iopmp-dpu-aclk",
989-
video_pll_clk_pd, 0x0, 28, 0);
989+
video_pll_clk_pd, 0x0, 28, CLK_IS_CRITICAL);
990990
static CCU_GATE(CLK_IOPMP_GPU_ACLK, iopmp_gpu_aclk, "iopmp-gpu-aclk",
991-
video_pll_clk_pd, 0x0, 29, 0);
991+
video_pll_clk_pd, 0x0, 29, CLK_IS_CRITICAL);
992992
static CCU_GATE(CLK_MIPIDSI0_PIXCLK, mipi_dsi0_pixclk, "mipi-dsi0-pixclk",
993993
video_pll_clk_pd, 0x0, 30, 0);
994994
static CCU_GATE(CLK_MIPIDSI1_PIXCLK, mipi_dsi1_pixclk, "mipi-dsi1-pixclk",

0 commit comments

Comments
 (0)