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ssuthiku-amdjoergroedel
ssuthiku-amd
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iommu/amd: Simplify and Consolidate Virtual APIC (AVIC) Enablement
Currently, enabling AVIC requires individually detect and enable GAM and GALOG features on each IOMMU, which is difficult to keep track on multi-IOMMU system, where the features needs to be enabled system-wide. In addition, these features do not need to be enabled in early stage. It can be delayed until after amd_iommu_init_pci(). Therefore, consolidate logic for detecting and enabling IOMMU GAM and GALOG features into a helper function, enable_iommus_vapic(), which uses the check_feature_on_all_iommus() helper function to ensure system-wide support of the features before enabling them, and postpone until after amd_iommu_init_pci(). The new function also check and clean up feature enablement residue from previous boot (e.g. in case of booting into kdump kernel), which triggers a WARN_ON (shown below) introduced by the commit a8d4a37 ("iommu/amd: Restore GA log/tail pointer on host resume") in iommu_ga_log_enable(). [ 7.731955] ------------[ cut here ]------------ [ 7.736575] WARNING: CPU: 0 PID: 1 at drivers/iommu/amd/init.c:829 iommu_ga_log_enable.isra.0+0x16f/0x190 [ 7.746135] Modules linked in: [ 7.749193] CPU: 0 PID: 1 Comm: swapper/0 Tainted: G W -------- --- 5.19.0-0.rc7.53.eln120.x86_64 #1 [ 7.759706] Hardware name: Dell Inc. PowerEdge R7525/04D5GJ, BIOS 2.1.6 03/09/2021 [ 7.767274] RIP: 0010:iommu_ga_log_enable.isra.0+0x16f/0x190 [ 7.772931] Code: 20 20 00 00 8b 00 f6 c4 01 74 da 48 8b 44 24 08 65 48 2b 04 25 28 00 00 00 75 13 48 83 c4 10 5b 5d e9 f5 00 72 00 0f 0b eb e1 <0f> 0b eb dd e8 f8 66 42 00 48 8b 15 f1 85 53 01 e9 29 ff ff ff 48 [ 7.791679] RSP: 0018:ffffc90000107d20 EFLAGS: 00010206 [ 7.796905] RAX: ffffc90000780000 RBX: 0000000000000100 RCX: ffffc90000780000 [ 7.804038] RDX: 0000000000000001 RSI: ffffc90000780000 RDI: ffff8880451f9800 [ 7.811170] RBP: ffff8880451f9800 R08: ffffffffffffffff R09: 0000000000000000 [ 7.818303] R10: 0000000000000000 R11: 0000000000000000 R12: 0008000000000000 [ 7.825435] R13: ffff8880462ea900 R14: 0000000000000021 R15: 0000000000000000 [ 7.832572] FS: 0000000000000000(0000) GS:ffff888054a00000(0000) knlGS:0000000000000000 [ 7.840657] CS: 0010 DS: 0000 ES: 0000 CR0: 0000000080050033 [ 7.846400] CR2: ffff888054dff000 CR3: 0000000053210000 CR4: 0000000000350eb0 [ 7.853533] Call Trace: [ 7.855979] <TASK> [ 7.858085] amd_iommu_enable_interrupts+0x180/0x270 [ 7.863051] ? iommu_setup+0x271/0x271 [ 7.866803] state_next+0x197/0x2c0 [ 7.870295] ? iommu_setup+0x271/0x271 [ 7.874049] iommu_go_to_state+0x24/0x2c [ 7.877976] amd_iommu_init+0xf/0x29 [ 7.881554] pci_iommu_init+0xe/0x36 [ 7.885133] do_one_initcall+0x44/0x200 [ 7.888975] do_initcalls+0xc8/0xe1 [ 7.892466] kernel_init_freeable+0x14c/0x199 [ 7.896826] ? rest_init+0xd0/0xd0 [ 7.900231] kernel_init+0x16/0x130 [ 7.903723] ret_from_fork+0x22/0x30 [ 7.907306] </TASK> [ 7.909497] ---[ end trace 0000000000000000 ]--- Fixes: commit a8d4a37 ("iommu/amd: Restore GA log/tail pointer on host resume") Reported-by: Jerry Snitselaar <jsnitsel@redhat.com> Cc: Joerg Roedel <joro@8bytes.org> Cc: Maxim Levitsky <mlevitsk@redhat.com> Cc: Will Deacon <will@kernel.org> (maintainer:IOMMU DRIVERS) Signed-off-by: Suravee Suthikulpanit <suravee.suthikulpanit@amd.com> Reviewed-by: Jerry Snitselaar <jsnitsel@redhat.com> Link: https://lore.kernel.org/r/20220726134348.6438-2-suravee.suthikulpanit@amd.com Signed-off-by: Joerg Roedel <jroedel@suse.de>
1 parent 30315e7 commit c5e1a1e

1 file changed

Lines changed: 55 additions & 30 deletions

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‎drivers/iommu/amd/init.c‎

Lines changed: 55 additions & 30 deletions
Original file line numberDiff line numberDiff line change
@@ -908,11 +908,6 @@ static int iommu_ga_log_enable(struct amd_iommu *iommu)
908908
if (!iommu->ga_log)
909909
return -EINVAL;
910910

911-
/* Check if already running */
912-
status = readl(iommu->mmio_base + MMIO_STATUS_OFFSET);
913-
if (WARN_ON(status & (MMIO_STATUS_GALOG_RUN_MASK)))
914-
return 0;
915-
916911
entry = iommu_virt_to_phys(iommu->ga_log) | GA_LOG_SIZE_512;
917912
memcpy_toio(iommu->mmio_base + MMIO_GA_LOG_BASE_OFFSET,
918913
&entry, sizeof(entry));
@@ -2068,10 +2063,6 @@ static int __init iommu_init_pci(struct amd_iommu *iommu)
20682063
if (iommu_feature(iommu, FEATURE_PPR) && alloc_ppr_log(iommu))
20692064
return -ENOMEM;
20702065

2071-
ret = iommu_init_ga_log(iommu);
2072-
if (ret)
2073-
return ret;
2074-
20752066
if (iommu->cap & (1UL << IOMMU_CAP_NPCACHE)) {
20762067
pr_info("Using strict mode due to virtualization\n");
20772068
iommu_set_dma_strict();
@@ -2155,8 +2146,6 @@ static void print_iommu_info(void)
21552146
}
21562147
if (irq_remapping_enabled) {
21572148
pr_info("Interrupt remapping enabled\n");
2158-
if (AMD_IOMMU_GUEST_IR_VAPIC(amd_iommu_guest_ir))
2159-
pr_info("Virtual APIC enabled\n");
21602149
if (amd_iommu_xt_mode == IRQ_REMAP_X2APIC_MODE)
21612150
pr_info("X2APIC enabled\n");
21622151
}
@@ -2446,9 +2435,6 @@ static int iommu_init_irq(struct amd_iommu *iommu)
24462435

24472436
if (iommu->ppr_log != NULL)
24482437
iommu_feature_enable(iommu, CONTROL_PPRINT_EN);
2449-
2450-
iommu_ga_log_enable(iommu);
2451-
24522438
return 0;
24532439
}
24542440

@@ -2678,8 +2664,6 @@ static void iommu_enable_ga(struct amd_iommu *iommu)
26782664
#ifdef CONFIG_IRQ_REMAP
26792665
switch (amd_iommu_guest_ir) {
26802666
case AMD_IOMMU_GUEST_IR_VAPIC:
2681-
iommu_feature_enable(iommu, CONTROL_GAM_EN);
2682-
fallthrough;
26832667
case AMD_IOMMU_GUEST_IR_LEGACY_GA:
26842668
iommu_feature_enable(iommu, CONTROL_GA_EN);
26852669
iommu->irte_ops = &irte_128_ops;
@@ -2759,19 +2743,6 @@ static void early_enable_iommus(void)
27592743
iommu_flush_all_caches(iommu);
27602744
}
27612745
}
2762-
2763-
#ifdef CONFIG_IRQ_REMAP
2764-
/*
2765-
* Note: We have already checked GASup from IVRS table.
2766-
* Now, we need to make sure that GAMSup is set.
2767-
*/
2768-
if (AMD_IOMMU_GUEST_IR_VAPIC(amd_iommu_guest_ir) &&
2769-
!check_feature_on_all_iommus(FEATURE_GAM_VAPIC))
2770-
amd_iommu_guest_ir = AMD_IOMMU_GUEST_IR_LEGACY_GA;
2771-
2772-
if (AMD_IOMMU_GUEST_IR_VAPIC(amd_iommu_guest_ir))
2773-
amd_iommu_irq_ops.capability |= (1 << IRQ_POSTING_CAP);
2774-
#endif
27752746
}
27762747

27772748
static void enable_iommus_v2(void)
@@ -2784,10 +2755,63 @@ static void enable_iommus_v2(void)
27842755
}
27852756
}
27862757

2758+
static void enable_iommus_vapic(void)
2759+
{
2760+
#ifdef CONFIG_IRQ_REMAP
2761+
u32 status, i;
2762+
struct amd_iommu *iommu;
2763+
2764+
for_each_iommu(iommu) {
2765+
/*
2766+
* Disable GALog if already running. It could have been enabled
2767+
* in the previous boot before kdump.
2768+
*/
2769+
status = readl(iommu->mmio_base + MMIO_STATUS_OFFSET);
2770+
if (!(status & MMIO_STATUS_GALOG_RUN_MASK))
2771+
continue;
2772+
2773+
iommu_feature_disable(iommu, CONTROL_GALOG_EN);
2774+
iommu_feature_disable(iommu, CONTROL_GAINT_EN);
2775+
2776+
/*
2777+
* Need to set and poll check the GALOGRun bit to zero before
2778+
* we can set/ modify GA Log registers safely.
2779+
*/
2780+
for (i = 0; i < LOOP_TIMEOUT; ++i) {
2781+
status = readl(iommu->mmio_base + MMIO_STATUS_OFFSET);
2782+
if (!(status & MMIO_STATUS_GALOG_RUN_MASK))
2783+
break;
2784+
udelay(10);
2785+
}
2786+
2787+
if (WARN_ON(i >= LOOP_TIMEOUT))
2788+
return;
2789+
}
2790+
2791+
if (AMD_IOMMU_GUEST_IR_VAPIC(amd_iommu_guest_ir) &&
2792+
!check_feature_on_all_iommus(FEATURE_GAM_VAPIC)) {
2793+
amd_iommu_guest_ir = AMD_IOMMU_GUEST_IR_LEGACY_GA;
2794+
return;
2795+
}
2796+
2797+
/* Enabling GAM support */
2798+
for_each_iommu(iommu) {
2799+
if (iommu_init_ga_log(iommu) ||
2800+
iommu_ga_log_enable(iommu))
2801+
return;
2802+
2803+
iommu_feature_enable(iommu, CONTROL_GAM_EN);
2804+
}
2805+
2806+
amd_iommu_irq_ops.capability |= (1 << IRQ_POSTING_CAP);
2807+
pr_info("Virtual APIC enabled\n");
2808+
#endif
2809+
}
2810+
27872811
static void enable_iommus(void)
27882812
{
27892813
early_enable_iommus();
2790-
2814+
enable_iommus_vapic();
27912815
enable_iommus_v2();
27922816
}
27932817

@@ -3126,6 +3150,7 @@ static int __init state_next(void)
31263150
register_syscore_ops(&amd_iommu_syscore_ops);
31273151
ret = amd_iommu_init_pci();
31283152
init_state = ret ? IOMMU_INIT_ERROR : IOMMU_PCI_INIT;
3153+
enable_iommus_vapic();
31293154
enable_iommus_v2();
31303155
break;
31313156
case IOMMU_PCI_INIT:

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