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mstrozeklag-linaro
mstrozek
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mfd: cs42l43: Fix wrong register defaults
A few regs have unnecessary values in defaults, change them to match the datasheet Fixes: ace6d14 ("mfd: cs42l43: Add support for cs42l43 core driver") Signed-off-by: Maciej Strozek <mstrozek@opensource.cirrus.com> Link: https://lore.kernel.org/r/20240229155616.118457-1-mstrozek@opensource.cirrus.com Signed-off-by: Lee Jones <lee@kernel.org>
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Lines changed: 34 additions & 34 deletions

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‎drivers/mfd/cs42l43.c‎

Lines changed: 34 additions & 34 deletions
Original file line numberDiff line numberDiff line change
@@ -137,38 +137,38 @@ const struct reg_default cs42l43_reg_default[CS42L43_N_DEFAULTS] = {
137137
{ CS42L43_ASP_TX_CH4_CTRL, 0x00170091 },
138138
{ CS42L43_ASP_TX_CH5_CTRL, 0x001700C1 },
139139
{ CS42L43_ASP_TX_CH6_CTRL, 0x001700F1 },
140-
{ CS42L43_ASPTX1_INPUT, 0x00800000 },
141-
{ CS42L43_ASPTX2_INPUT, 0x00800000 },
142-
{ CS42L43_ASPTX3_INPUT, 0x00800000 },
143-
{ CS42L43_ASPTX4_INPUT, 0x00800000 },
144-
{ CS42L43_ASPTX5_INPUT, 0x00800000 },
145-
{ CS42L43_ASPTX6_INPUT, 0x00800000 },
146-
{ CS42L43_SWIRE_DP1_CH1_INPUT, 0x00800000 },
147-
{ CS42L43_SWIRE_DP1_CH2_INPUT, 0x00800000 },
148-
{ CS42L43_SWIRE_DP1_CH3_INPUT, 0x00800000 },
149-
{ CS42L43_SWIRE_DP1_CH4_INPUT, 0x00800000 },
150-
{ CS42L43_SWIRE_DP2_CH1_INPUT, 0x00800000 },
151-
{ CS42L43_SWIRE_DP2_CH2_INPUT, 0x00800000 },
152-
{ CS42L43_SWIRE_DP3_CH1_INPUT, 0x00800000 },
153-
{ CS42L43_SWIRE_DP3_CH2_INPUT, 0x00800000 },
154-
{ CS42L43_SWIRE_DP4_CH1_INPUT, 0x00800000 },
155-
{ CS42L43_SWIRE_DP4_CH2_INPUT, 0x00800000 },
156-
{ CS42L43_ASRC_INT1_INPUT1, 0x00800000 },
157-
{ CS42L43_ASRC_INT2_INPUT1, 0x00800000 },
158-
{ CS42L43_ASRC_INT3_INPUT1, 0x00800000 },
159-
{ CS42L43_ASRC_INT4_INPUT1, 0x00800000 },
160-
{ CS42L43_ASRC_DEC1_INPUT1, 0x00800000 },
161-
{ CS42L43_ASRC_DEC2_INPUT1, 0x00800000 },
162-
{ CS42L43_ASRC_DEC3_INPUT1, 0x00800000 },
163-
{ CS42L43_ASRC_DEC4_INPUT1, 0x00800000 },
164-
{ CS42L43_ISRC1INT1_INPUT1, 0x00800000 },
165-
{ CS42L43_ISRC1INT2_INPUT1, 0x00800000 },
166-
{ CS42L43_ISRC1DEC1_INPUT1, 0x00800000 },
167-
{ CS42L43_ISRC1DEC2_INPUT1, 0x00800000 },
168-
{ CS42L43_ISRC2INT1_INPUT1, 0x00800000 },
169-
{ CS42L43_ISRC2INT2_INPUT1, 0x00800000 },
170-
{ CS42L43_ISRC2DEC1_INPUT1, 0x00800000 },
171-
{ CS42L43_ISRC2DEC2_INPUT1, 0x00800000 },
140+
{ CS42L43_ASPTX1_INPUT, 0x00000000 },
141+
{ CS42L43_ASPTX2_INPUT, 0x00000000 },
142+
{ CS42L43_ASPTX3_INPUT, 0x00000000 },
143+
{ CS42L43_ASPTX4_INPUT, 0x00000000 },
144+
{ CS42L43_ASPTX5_INPUT, 0x00000000 },
145+
{ CS42L43_ASPTX6_INPUT, 0x00000000 },
146+
{ CS42L43_SWIRE_DP1_CH1_INPUT, 0x00000000 },
147+
{ CS42L43_SWIRE_DP1_CH2_INPUT, 0x00000000 },
148+
{ CS42L43_SWIRE_DP1_CH3_INPUT, 0x00000000 },
149+
{ CS42L43_SWIRE_DP1_CH4_INPUT, 0x00000000 },
150+
{ CS42L43_SWIRE_DP2_CH1_INPUT, 0x00000000 },
151+
{ CS42L43_SWIRE_DP2_CH2_INPUT, 0x00000000 },
152+
{ CS42L43_SWIRE_DP3_CH1_INPUT, 0x00000000 },
153+
{ CS42L43_SWIRE_DP3_CH2_INPUT, 0x00000000 },
154+
{ CS42L43_SWIRE_DP4_CH1_INPUT, 0x00000000 },
155+
{ CS42L43_SWIRE_DP4_CH2_INPUT, 0x00000000 },
156+
{ CS42L43_ASRC_INT1_INPUT1, 0x00000000 },
157+
{ CS42L43_ASRC_INT2_INPUT1, 0x00000000 },
158+
{ CS42L43_ASRC_INT3_INPUT1, 0x00000000 },
159+
{ CS42L43_ASRC_INT4_INPUT1, 0x00000000 },
160+
{ CS42L43_ASRC_DEC1_INPUT1, 0x00000000 },
161+
{ CS42L43_ASRC_DEC2_INPUT1, 0x00000000 },
162+
{ CS42L43_ASRC_DEC3_INPUT1, 0x00000000 },
163+
{ CS42L43_ASRC_DEC4_INPUT1, 0x00000000 },
164+
{ CS42L43_ISRC1INT1_INPUT1, 0x00000000 },
165+
{ CS42L43_ISRC1INT2_INPUT1, 0x00000000 },
166+
{ CS42L43_ISRC1DEC1_INPUT1, 0x00000000 },
167+
{ CS42L43_ISRC1DEC2_INPUT1, 0x00000000 },
168+
{ CS42L43_ISRC2INT1_INPUT1, 0x00000000 },
169+
{ CS42L43_ISRC2INT2_INPUT1, 0x00000000 },
170+
{ CS42L43_ISRC2DEC1_INPUT1, 0x00000000 },
171+
{ CS42L43_ISRC2DEC2_INPUT1, 0x00000000 },
172172
{ CS42L43_EQ1MIX_INPUT1, 0x00800000 },
173173
{ CS42L43_EQ1MIX_INPUT2, 0x00800000 },
174174
{ CS42L43_EQ1MIX_INPUT3, 0x00800000 },
@@ -177,8 +177,8 @@ const struct reg_default cs42l43_reg_default[CS42L43_N_DEFAULTS] = {
177177
{ CS42L43_EQ2MIX_INPUT2, 0x00800000 },
178178
{ CS42L43_EQ2MIX_INPUT3, 0x00800000 },
179179
{ CS42L43_EQ2MIX_INPUT4, 0x00800000 },
180-
{ CS42L43_SPDIF1_INPUT1, 0x00800000 },
181-
{ CS42L43_SPDIF2_INPUT1, 0x00800000 },
180+
{ CS42L43_SPDIF1_INPUT1, 0x00000000 },
181+
{ CS42L43_SPDIF2_INPUT1, 0x00000000 },
182182
{ CS42L43_AMP1MIX_INPUT1, 0x00800000 },
183183
{ CS42L43_AMP1MIX_INPUT2, 0x00800000 },
184184
{ CS42L43_AMP1MIX_INPUT3, 0x00800000 },

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