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ktbowmandjbw
ktbowman
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cxl/pci: Refactor component register discovery for reuse
The endpoint implements component register setup code. Refactor it for reuse with RCRB, downstream port, and upstream port setup. Move PCI specifics from cxl_setup_regs() into cxl_pci_setup_regs(). Move cxl_setup_regs() into cxl/core/regs.c and export it. This also includes supporting static functions cxl_map_registerblock(), cxl_unmap_register_block() and cxl_probe_regs(). Co-developed-by: Robert Richter <rrichter@amd.com> Signed-off-by: Robert Richter <rrichter@amd.com> Signed-off-by: Terry Bowman <terry.bowman@amd.com> Reviewed-by: Jonathan Cameron <Jonathan.Cameron@huawei.com> Link: https://lore.kernel.org/r/20230622205523.85375-8-terry.bowman@amd.com Signed-off-by: Dan Williams <dan.j.williams@intel.com>
1 parent 5734080 commit d076bb8

3 files changed

Lines changed: 83 additions & 74 deletions

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‎drivers/cxl/core/regs.c‎

Lines changed: 77 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -338,6 +338,83 @@ int cxl_find_regblock(struct pci_dev *pdev, enum cxl_regloc_type type,
338338
}
339339
EXPORT_SYMBOL_NS_GPL(cxl_find_regblock, CXL);
340340

341+
static int cxl_map_regblock(struct cxl_register_map *map)
342+
{
343+
struct device *dev = map->dev;
344+
345+
map->base = ioremap(map->resource, map->max_size);
346+
if (!map->base) {
347+
dev_err(dev, "failed to map registers\n");
348+
return -ENOMEM;
349+
}
350+
351+
dev_dbg(dev, "Mapped CXL Memory Device resource %pa\n", &map->resource);
352+
return 0;
353+
}
354+
355+
static void cxl_unmap_regblock(struct cxl_register_map *map)
356+
{
357+
iounmap(map->base);
358+
map->base = NULL;
359+
}
360+
361+
static int cxl_probe_regs(struct cxl_register_map *map)
362+
{
363+
struct cxl_component_reg_map *comp_map;
364+
struct cxl_device_reg_map *dev_map;
365+
struct device *dev = map->dev;
366+
void __iomem *base = map->base;
367+
368+
switch (map->reg_type) {
369+
case CXL_REGLOC_RBI_COMPONENT:
370+
comp_map = &map->component_map;
371+
cxl_probe_component_regs(dev, base, comp_map);
372+
if (!comp_map->hdm_decoder.valid) {
373+
dev_err(dev, "HDM decoder registers not found\n");
374+
return -ENXIO;
375+
}
376+
377+
if (!comp_map->ras.valid)
378+
dev_dbg(dev, "RAS registers not found\n");
379+
380+
dev_dbg(dev, "Set up component registers\n");
381+
break;
382+
case CXL_REGLOC_RBI_MEMDEV:
383+
dev_map = &map->device_map;
384+
cxl_probe_device_regs(dev, base, dev_map);
385+
if (!dev_map->status.valid || !dev_map->mbox.valid ||
386+
!dev_map->memdev.valid) {
387+
dev_err(dev, "registers not found: %s%s%s\n",
388+
!dev_map->status.valid ? "status " : "",
389+
!dev_map->mbox.valid ? "mbox " : "",
390+
!dev_map->memdev.valid ? "memdev " : "");
391+
return -ENXIO;
392+
}
393+
394+
dev_dbg(dev, "Probing device registers...\n");
395+
break;
396+
default:
397+
break;
398+
}
399+
400+
return 0;
401+
}
402+
403+
int cxl_setup_regs(struct cxl_register_map *map)
404+
{
405+
int rc;
406+
407+
rc = cxl_map_regblock(map);
408+
if (rc)
409+
return rc;
410+
411+
rc = cxl_probe_regs(map);
412+
cxl_unmap_regblock(map);
413+
414+
return rc;
415+
}
416+
EXPORT_SYMBOL_NS_GPL(cxl_setup_regs, CXL);
417+
341418
resource_size_t __rcrb_to_component(struct device *dev, struct cxl_rcrb_info *ri,
342419
enum cxl_rcrb which)
343420
{

‎drivers/cxl/cxl.h‎

Lines changed: 1 addition & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -264,6 +264,7 @@ int cxl_map_device_regs(struct cxl_register_map *map,
264264
enum cxl_regloc_type;
265265
int cxl_find_regblock(struct pci_dev *pdev, enum cxl_regloc_type type,
266266
struct cxl_register_map *map);
267+
int cxl_setup_regs(struct cxl_register_map *map);
267268
struct cxl_dport;
268269
resource_size_t cxl_rcd_component_reg_phys(struct device *dev,
269270
struct cxl_dport *dport);

‎drivers/cxl/pci.c‎

Lines changed: 5 additions & 74 deletions
Original file line numberDiff line numberDiff line change
@@ -274,85 +274,16 @@ static int cxl_pci_setup_mailbox(struct cxl_dev_state *cxlds)
274274
return 0;
275275
}
276276

277-
static int cxl_map_regblock(struct cxl_register_map *map)
278-
{
279-
struct device *dev = map->dev;
280-
281-
map->base = ioremap(map->resource, map->max_size);
282-
if (!map->base) {
283-
dev_err(dev, "failed to map registers\n");
284-
return -ENOMEM;
285-
}
286-
287-
dev_dbg(dev, "Mapped CXL Memory Device resource %pa\n", &map->resource);
288-
return 0;
289-
}
290-
291-
static void cxl_unmap_regblock(struct cxl_register_map *map)
292-
{
293-
iounmap(map->base);
294-
map->base = NULL;
295-
}
296-
297-
static int cxl_probe_regs(struct cxl_register_map *map)
298-
{
299-
struct cxl_component_reg_map *comp_map;
300-
struct cxl_device_reg_map *dev_map;
301-
struct device *dev = map->dev;
302-
void __iomem *base = map->base;
303-
304-
switch (map->reg_type) {
305-
case CXL_REGLOC_RBI_COMPONENT:
306-
comp_map = &map->component_map;
307-
cxl_probe_component_regs(dev, base, comp_map);
308-
if (!comp_map->hdm_decoder.valid) {
309-
dev_err(dev, "HDM decoder registers not found\n");
310-
return -ENXIO;
311-
}
312-
313-
if (!comp_map->ras.valid)
314-
dev_dbg(dev, "RAS registers not found\n");
315-
316-
dev_dbg(dev, "Set up component registers\n");
317-
break;
318-
case CXL_REGLOC_RBI_MEMDEV:
319-
dev_map = &map->device_map;
320-
cxl_probe_device_regs(dev, base, dev_map);
321-
if (!dev_map->status.valid || !dev_map->mbox.valid ||
322-
!dev_map->memdev.valid) {
323-
dev_err(dev, "registers not found: %s%s%s\n",
324-
!dev_map->status.valid ? "status " : "",
325-
!dev_map->mbox.valid ? "mbox " : "",
326-
!dev_map->memdev.valid ? "memdev " : "");
327-
return -ENXIO;
328-
}
329-
330-
dev_dbg(dev, "Probing device registers...\n");
331-
break;
332-
default:
333-
break;
334-
}
335-
336-
return 0;
337-
}
338-
339-
static int cxl_setup_regs(struct pci_dev *pdev, enum cxl_regloc_type type,
340-
struct cxl_register_map *map)
277+
static int cxl_pci_setup_regs(struct pci_dev *pdev, enum cxl_regloc_type type,
278+
struct cxl_register_map *map)
341279
{
342280
int rc;
343281

344282
rc = cxl_find_regblock(pdev, type, map);
345283
if (rc)
346284
return rc;
347285

348-
rc = cxl_map_regblock(map);
349-
if (rc)
350-
return rc;
351-
352-
rc = cxl_probe_regs(map);
353-
cxl_unmap_regblock(map);
354-
355-
return rc;
286+
return cxl_setup_regs(map);
356287
}
357288

358289
/*
@@ -683,7 +614,7 @@ static int cxl_pci_probe(struct pci_dev *pdev, const struct pci_device_id *id)
683614
dev_warn(&pdev->dev,
684615
"Device DVSEC not present, skip CXL.mem init\n");
685616

686-
rc = cxl_setup_regs(pdev, CXL_REGLOC_RBI_MEMDEV, &map);
617+
rc = cxl_pci_setup_regs(pdev, CXL_REGLOC_RBI_MEMDEV, &map);
687618
if (rc)
688619
return rc;
689620

@@ -696,7 +627,7 @@ static int cxl_pci_probe(struct pci_dev *pdev, const struct pci_device_id *id)
696627
* still be useful for management functions so don't return an error.
697628
*/
698629
cxlds->component_reg_phys = CXL_RESOURCE_NONE;
699-
rc = cxl_setup_regs(pdev, CXL_REGLOC_RBI_COMPONENT, &map);
630+
rc = cxl_pci_setup_regs(pdev, CXL_REGLOC_RBI_COMPONENT, &map);
700631
if (rc)
701632
dev_warn(&pdev->dev, "No component registers (%d)\n", rc);
702633

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