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Dawei LiKAGA-KOKO
Dawei Li
authored and
KAGA-KOKO
committed
irqchip/gic(v3): Replace gic_irq() with irqd_to_hwirq()
GIC & GIC-v3 share same gic_irq() implementations, both of which serve exact same purpose as irqd_to_hwirq(). irqd_to_hwirq() is a generic and top level API of the interrupt subsystem, it's independent of any chip implementation. Replace gic_irq() with irqd_to_hwirq() and convert struct irq_data::hwirq to irq_hw_number_t explicitly. Suggested-by: Marc Zyngier <maz@kernel.org> Signed-off-by: Dawei Li <dawei.li@shingroup.cn> Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Link: https://lore.kernel.org/r/20240122085716.2999875-3-dawei.li@shingroup.cn
1 parent a0c446d commit d22083a

3 files changed

Lines changed: 20 additions & 28 deletions

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‎drivers/irqchip/irq-gic-v3.c‎

Lines changed: 7 additions & 12 deletions
Original file line numberDiff line numberDiff line change
@@ -181,11 +181,6 @@ static enum gic_intid_range get_intid_range(struct irq_data *d)
181181
return __get_intid_range(d->hwirq);
182182
}
183183

184-
static inline unsigned int gic_irq(struct irq_data *d)
185-
{
186-
return d->hwirq;
187-
}
188-
189184
static inline bool gic_irq_in_rdist(struct irq_data *d)
190185
{
191186
switch (get_intid_range(d)) {
@@ -542,7 +537,7 @@ static int gic_irq_nmi_setup(struct irq_data *d)
542537
* A secondary irq_chip should be in charge of LPI request,
543538
* it should not be possible to get there
544539
*/
545-
if (WARN_ON(gic_irq(d) >= 8192))
540+
if (WARN_ON(irqd_to_hwirq(d) >= 8192))
546541
return -EINVAL;
547542

548543
/* desc lock should already be held */
@@ -582,7 +577,7 @@ static void gic_irq_nmi_teardown(struct irq_data *d)
582577
* A secondary irq_chip should be in charge of LPI request,
583578
* it should not be possible to get there
584579
*/
585-
if (WARN_ON(gic_irq(d) >= 8192))
580+
if (WARN_ON(irqd_to_hwirq(d) >= 8192))
586581
return;
587582

588583
/* desc lock should already be held */
@@ -620,7 +615,7 @@ static bool gic_arm64_erratum_2941627_needed(struct irq_data *d)
620615

621616
static void gic_eoi_irq(struct irq_data *d)
622617
{
623-
write_gicreg(gic_irq(d), ICC_EOIR1_EL1);
618+
write_gicreg(irqd_to_hwirq(d), ICC_EOIR1_EL1);
624619
isb();
625620

626621
if (gic_arm64_erratum_2941627_needed(d)) {
@@ -640,19 +635,19 @@ static void gic_eoimode1_eoi_irq(struct irq_data *d)
640635
* No need to deactivate an LPI, or an interrupt that
641636
* is is getting forwarded to a vcpu.
642637
*/
643-
if (gic_irq(d) >= 8192 || irqd_is_forwarded_to_vcpu(d))
638+
if (irqd_to_hwirq(d) >= 8192 || irqd_is_forwarded_to_vcpu(d))
644639
return;
645640

646641
if (!gic_arm64_erratum_2941627_needed(d))
647-
gic_write_dir(gic_irq(d));
642+
gic_write_dir(irqd_to_hwirq(d));
648643
else
649644
gic_poke_irq(d, GICD_ICACTIVER);
650645
}
651646

652647
static int gic_set_type(struct irq_data *d, unsigned int type)
653648
{
649+
irq_hw_number_t irq = irqd_to_hwirq(d);
654650
enum gic_intid_range range;
655-
unsigned int irq = gic_irq(d);
656651
void __iomem *base;
657652
u32 offset, index;
658653
int ret;
@@ -678,7 +673,7 @@ static int gic_set_type(struct irq_data *d, unsigned int type)
678673
ret = gic_configure_irq(index, type, base + offset, NULL);
679674
if (ret && (range == PPI_RANGE || range == EPPI_RANGE)) {
680675
/* Misconfigured PPIs are usually not fatal */
681-
pr_warn("GIC: PPI INTID%d is secure or misconfigured\n", irq);
676+
pr_warn("GIC: PPI INTID%ld is secure or misconfigured\n", irq);
682677
ret = 0;
683678
}
684679

‎drivers/irqchip/irq-gic.c‎

Lines changed: 12 additions & 15 deletions
Original file line numberDiff line numberDiff line change
@@ -162,11 +162,6 @@ static inline void __iomem *gic_cpu_base(struct irq_data *d)
162162
return gic_data_cpu_base(gic_data);
163163
}
164164

165-
static inline unsigned int gic_irq(struct irq_data *d)
166-
{
167-
return d->hwirq;
168-
}
169-
170165
static inline bool cascading_gic_irq(struct irq_data *d)
171166
{
172167
void *data = irq_data_get_irq_handler_data(d);
@@ -183,14 +178,16 @@ static inline bool cascading_gic_irq(struct irq_data *d)
183178
*/
184179
static void gic_poke_irq(struct irq_data *d, u32 offset)
185180
{
186-
u32 mask = 1 << (gic_irq(d) % 32);
187-
writel_relaxed(mask, gic_dist_base(d) + offset + (gic_irq(d) / 32) * 4);
181+
u32 mask = 1 << (irqd_to_hwirq(d) % 32);
182+
183+
writel_relaxed(mask, gic_dist_base(d) + offset + (irqd_to_hwirq(d) / 32) * 4);
188184
}
189185

190186
static int gic_peek_irq(struct irq_data *d, u32 offset)
191187
{
192-
u32 mask = 1 << (gic_irq(d) % 32);
193-
return !!(readl_relaxed(gic_dist_base(d) + offset + (gic_irq(d) / 32) * 4) & mask);
188+
u32 mask = 1 << (irqd_to_hwirq(d) % 32);
189+
190+
return !!(readl_relaxed(gic_dist_base(d) + offset + (irqd_to_hwirq(d) / 32) * 4) & mask);
194191
}
195192

196193
static void gic_mask_irq(struct irq_data *d)
@@ -220,7 +217,7 @@ static void gic_unmask_irq(struct irq_data *d)
220217

221218
static void gic_eoi_irq(struct irq_data *d)
222219
{
223-
u32 hwirq = gic_irq(d);
220+
irq_hw_number_t hwirq = irqd_to_hwirq(d);
224221

225222
if (hwirq < 16)
226223
hwirq = this_cpu_read(sgi_intid);
@@ -230,7 +227,7 @@ static void gic_eoi_irq(struct irq_data *d)
230227

231228
static void gic_eoimode1_eoi_irq(struct irq_data *d)
232229
{
233-
u32 hwirq = gic_irq(d);
230+
irq_hw_number_t hwirq = irqd_to_hwirq(d);
234231

235232
/* Do not deactivate an IRQ forwarded to a vcpu. */
236233
if (irqd_is_forwarded_to_vcpu(d))
@@ -293,8 +290,8 @@ static int gic_irq_get_irqchip_state(struct irq_data *d,
293290

294291
static int gic_set_type(struct irq_data *d, unsigned int type)
295292
{
293+
irq_hw_number_t gicirq = irqd_to_hwirq(d);
296294
void __iomem *base = gic_dist_base(d);
297-
unsigned int gicirq = gic_irq(d);
298295
int ret;
299296

300297
/* Interrupt configuration for SGIs can't be changed */
@@ -309,7 +306,7 @@ static int gic_set_type(struct irq_data *d, unsigned int type)
309306
ret = gic_configure_irq(gicirq, type, base + GIC_DIST_CONFIG, NULL);
310307
if (ret && gicirq < 32) {
311308
/* Misconfigured PPIs are usually not fatal */
312-
pr_warn("GIC: PPI%d is secure or misconfigured\n", gicirq - 16);
309+
pr_warn("GIC: PPI%ld is secure or misconfigured\n", gicirq - 16);
313310
ret = 0;
314311
}
315312

@@ -319,7 +316,7 @@ static int gic_set_type(struct irq_data *d, unsigned int type)
319316
static int gic_irq_set_vcpu_affinity(struct irq_data *d, void *vcpu)
320317
{
321318
/* Only interrupts on the primary GIC can be forwarded to a vcpu. */
322-
if (cascading_gic_irq(d) || gic_irq(d) < 16)
319+
if (cascading_gic_irq(d) || irqd_to_hwirq(d) < 16)
323320
return -EINVAL;
324321

325322
if (vcpu)
@@ -796,7 +793,7 @@ static void rmw_writeb(u8 bval, void __iomem *addr)
796793
static int gic_set_affinity(struct irq_data *d, const struct cpumask *mask_val,
797794
bool force)
798795
{
799-
void __iomem *reg = gic_dist_base(d) + GIC_DIST_TARGET + gic_irq(d);
796+
void __iomem *reg = gic_dist_base(d) + GIC_DIST_TARGET + irqd_to_hwirq(d);
800797
struct gic_chip_data *gic = irq_data_get_irq_chip_data(d);
801798
unsigned int cpu;
802799

‎include/linux/irq.h‎

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -179,7 +179,7 @@ struct irq_common_data {
179179
struct irq_data {
180180
u32 mask;
181181
unsigned int irq;
182-
unsigned long hwirq;
182+
irq_hw_number_t hwirq;
183183
struct irq_common_data *common;
184184
struct irq_chip *chip;
185185
struct irq_domain *domain;

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