Merge tag 'drm-fixes-2026-01-23' of https://gitlab.freedesktop.org/drm/kernel

Pull drm fixes from Dave Airlie:
 "Probably a good thing you decided to do an rc8 in this round. Nothing
  stands out, but xe/amdgpu and mediatek all have a bunch of fixes, and
  then there are a few other single patches. Hopefully next week is
  calmer for release.

  xe:
   - Disallow bind-queue sharing across multiple VMs
   - Fix xe userptr in the absence of CONFIG_DEVICE_PRIVATE
   - Fix a missed page count update
   - Fix a confused argument to alloc_workqueue()
   - Kernel-doc fixes
   - Disable a workaround on VFs
   - Fix a job lock assert
   - Update wedged.mode only after successful reset policy change
   - Select CONFIG_DEVICE_PRIVATE when DRM_XE_GPUSVM is selected

  amdgpu:
   - fix color pipeline string leak
   - GC 12 fix
   - Misc error path fixes
   - DC analog fix
   - SMU 6 fixes
   - TLB flush fix
   - DC idle optimization fix

  amdkfd:
   - GC 11 cooperative launch fix

  imagination:
   - sync wait for logtype update completion to ensure FW trace
     is available

  bridge/synopsis:
   - Fix error paths in dw_dp_bind

  nouveau:
   - Add and implement missing DSB connector types, and improve
     unknown connector handling
   - Set missing atomic function ops

  intel:
   - place 3D lut at correct place in pipeline
   - fix color pipeline string leak

  vkms:
   - fix color pipeline string leak

  mediatek:
   - Fix platform_get_irq() error checking
   - HDMI DDC v2 driver fixes
   - dpi: Find next bridge during probe
   - mtk_gem: Partial refactor and use drm_gem_dma_object
   - dt-bindings: Fix typo 'hardwares' to 'hardware'"

* tag 'drm-fixes-2026-01-23' of https://gitlab.freedesktop.org/drm/kernel: (38 commits)
  Revert "drm/amd/display: pause the workload setting in dm"
  drm/xe: Select CONFIG_DEVICE_PRIVATE when DRM_XE_GPUSVM is selected
  drm, drm/xe: Fix xe userptr in the absence of CONFIG_DEVICE_PRIVATE
  drm/i915/display: Fix color pipeline enum name leak
  drm/vkms: Fix color pipeline enum name leak
  drm/amd/display: Fix color pipeline enum name leak
  drm/i915/color: Place 3D LUT after CSC in plane color pipeline
  drm/nouveau/disp: Set drm_mode_config_funcs.atomic_(check|commit)
  drm/nouveau: implement missing DCB connector types; gracefully handle unknown connectors
  drm/nouveau: add missing DCB connector types
  drm/amdgpu: fix type for wptr in ring backup
  drm/amdgpu: Fix validating flush_gpu_tlb_pasid()
  drm/amd/pm: Workaround SI powertune issue on Radeon 430 (v2)
  drm/amd/pm: Don't clear SI SMC table when setting power limit
  drm/amd/pm: Fix si_dpm mmCG_THERMAL_INT setting
  drm/xe: Update wedged.mode only after successful reset policy change
  drm/xe/migrate: fix job lock assert
  drm/xe/uapi: disallow bind queue sharing
  drm/amd/display: Only poll analog connectors
  drm/amdgpu: fix error handling in ib_schedule()
  ...

Author: torvalds

Documentation/devicetree/bindings/display/mediatek/mediatek,dp.yaml

@@ -11,7 +11,7 @@ maintainers:
   - Jitao shi <jitao.shi@mediatek.com>
 
 description: |
-  MediaTek DP and eDP are different hardwares and there are some features
+  MediaTek DP and eDP are different hardware and there are some features
   which are not supported for eDP. For example, audio is not supported for
   eDP. Therefore, we need to use two different compatibles to describe them.
   In addition, We just need to enable the power domain of DP, so the clock

drivers/gpu/drm/Kconfig

@@ -210,7 +210,7 @@ config DRM_GPUVM
 
 config DRM_GPUSVM
 	tristate
-	depends on DRM && DEVICE_PRIVATE
+	depends on DRM
 	select HMM_MIRROR
 	select MMU_NOTIFIER
 	help

drivers/gpu/drm/Makefile

@@ -108,8 +108,10 @@ obj-$(CONFIG_DRM_EXEC) += drm_exec.o
 obj-$(CONFIG_DRM_GPUVM) += drm_gpuvm.o
 
 drm_gpusvm_helper-y := \
-	drm_gpusvm.o\
+	drm_gpusvm.o
+drm_gpusvm_helper-$(CONFIG_ZONE_DEVICE) += \
 	drm_pagemap.o
+
 obj-$(CONFIG_DRM_GPUSVM) += drm_gpusvm_helper.o
 
 obj-$(CONFIG_DRM_BUDDY) += drm_buddy.o

drivers/gpu/drm/amd/amdgpu/amdgpu_fence.c

@@ -763,7 +763,7 @@ void amdgpu_fence_save_wptr(struct amdgpu_fence *af)
 }
 
 static void amdgpu_ring_backup_unprocessed_command(struct amdgpu_ring *ring,
-						   u64 start_wptr, u32 end_wptr)
+						   u64 start_wptr, u64 end_wptr)
 {
 	unsigned int first_idx = start_wptr & ring->buf_mask;
 	unsigned int last_idx = end_wptr & ring->buf_mask;

drivers/gpu/drm/amd/amdgpu/amdgpu_gmc.c

@@ -733,8 +733,10 @@ int amdgpu_gmc_flush_gpu_tlb_pasid(struct amdgpu_device *adev, uint16_t pasid,
 
 	if (!adev->gmc.flush_pasid_uses_kiq || !ring->sched.ready) {
 
-		if (!adev->gmc.gmc_funcs->flush_gpu_tlb_pasid)
-			return 0;
+		if (!adev->gmc.gmc_funcs->flush_gpu_tlb_pasid) {
+			r = 0;
+			goto error_unlock_reset;
+		}
 
 		if (adev->gmc.flush_tlb_needs_extra_type_2)
 			adev->gmc.gmc_funcs->flush_gpu_tlb_pasid(adev, pasid,

drivers/gpu/drm/amd/amdgpu/amdgpu_ib.c

@@ -302,7 +302,7 @@ int amdgpu_ib_schedule(struct amdgpu_ring *ring, unsigned int num_ibs,
 		if (job && job->vmid)
 			amdgpu_vmid_reset(adev, ring->vm_hub, job->vmid);
 		amdgpu_ring_undo(ring);
-		return r;
+		goto free_fence;
 	}
 	*f = &af->base;
 	/* get a ref for the job */

drivers/gpu/drm/amd/amdgpu/amdgpu_job.c

@@ -217,8 +217,11 @@ int amdgpu_job_alloc(struct amdgpu_device *adev, struct amdgpu_vm *vm,
 	if (!entity)
 		return 0;
 
-	return drm_sched_job_init(&(*job)->base, entity, 1, owner,
-				  drm_client_id);
+	r = drm_sched_job_init(&(*job)->base, entity, 1, owner, drm_client_id);
+	if (!r)
+		return 0;
+
+	kfree((*job)->hw_vm_fence);
 
 err_fence:
 	kfree((*job)->hw_fence);

drivers/gpu/drm/amd/amdgpu/gfx_v12_0.c

@@ -278,7 +278,6 @@ static void gfx_v12_0_select_se_sh(struct amdgpu_device *adev, u32 se_num,
 				   u32 sh_num, u32 instance, int xcc_id);
 static u32 gfx_v12_0_get_wgp_active_bitmap_per_sh(struct amdgpu_device *adev);
 
-static void gfx_v12_0_ring_emit_frame_cntl(struct amdgpu_ring *ring, bool start, bool secure);
 static void gfx_v12_0_ring_emit_wreg(struct amdgpu_ring *ring, uint32_t reg,
 				     uint32_t val);
 static int gfx_v12_0_wait_for_rlc_autoload_complete(struct amdgpu_device *adev);
@@ -4634,16 +4633,6 @@ static int gfx_v12_0_ring_preempt_ib(struct amdgpu_ring *ring)
 	return r;
 }
 
-static void gfx_v12_0_ring_emit_frame_cntl(struct amdgpu_ring *ring,
-					   bool start,
-					   bool secure)
-{
-	uint32_t v = secure ? FRAME_TMZ : 0;
-
-	amdgpu_ring_write(ring, PACKET3(PACKET3_FRAME_CONTROL, 0));
-	amdgpu_ring_write(ring, v | FRAME_CMD(start ? 0 : 1));
-}
-
 static void gfx_v12_0_ring_emit_rreg(struct amdgpu_ring *ring, uint32_t reg,
 				     uint32_t reg_val_offs)
 {
@@ -5520,7 +5509,6 @@ static const struct amdgpu_ring_funcs gfx_v12_0_ring_funcs_gfx = {
 	.emit_cntxcntl = gfx_v12_0_ring_emit_cntxcntl,
 	.init_cond_exec = gfx_v12_0_ring_emit_init_cond_exec,
 	.preempt_ib = gfx_v12_0_ring_preempt_ib,
-	.emit_frame_cntl = gfx_v12_0_ring_emit_frame_cntl,
 	.emit_wreg = gfx_v12_0_ring_emit_wreg,
 	.emit_reg_wait = gfx_v12_0_ring_emit_reg_wait,
 	.emit_reg_write_reg_wait = gfx_v12_0_ring_emit_reg_write_reg_wait,

drivers/gpu/drm/amd/amdkfd/kfd_debug.h

@@ -120,8 +120,7 @@ static inline bool kfd_dbg_has_gws_support(struct kfd_node *dev)
 			&& dev->kfd->mec2_fw_version < 0x1b6) ||
 		(KFD_GC_VERSION(dev) == IP_VERSION(9, 4, 1)
 			&& dev->kfd->mec2_fw_version < 0x30) ||
-		(KFD_GC_VERSION(dev) >= IP_VERSION(11, 0, 0) &&
-			KFD_GC_VERSION(dev) < IP_VERSION(12, 0, 0)))
+		kfd_dbg_has_cwsr_workaround(dev))
 		return false;
 
 	/* Assume debugging and cooperative launch supported otherwise. */

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_colorop.c

@@ -79,7 +79,6 @@ int amdgpu_dm_initialize_default_pipeline(struct drm_plane *plane, struct drm_pr
 		goto cleanup;
 
 	list->type = ops[i]->base.id;
-	list->name = kasprintf(GFP_KERNEL, "Color Pipeline %d", ops[i]->base.id);
 
 	i++;
 
@@ -197,6 +196,9 @@ int amdgpu_dm_initialize_default_pipeline(struct drm_plane *plane, struct drm_pr
 		goto cleanup;
 
 	drm_colorop_set_next_property(ops[i-1], ops[i]);
+
+	list->name = kasprintf(GFP_KERNEL, "Color Pipeline %d", ops[0]->base.id);
+
 	return 0;
 
 cleanup: