|
214 | 214 | allwinner,pinmux = <2>; |
215 | 215 | }; |
216 | 216 |
|
| 217 | + /omit-if-no-ref/ |
| 218 | + spi0_pc_pins: spi0-pc-pins { |
| 219 | + pins = "PC2", "PC4", "PC12"; |
| 220 | + function = "spi0"; |
| 221 | + allwinner,pinmux = <4>; |
| 222 | + }; |
| 223 | + |
| 224 | + /omit-if-no-ref/ |
| 225 | + spi0_cs0_pc_pin: spi0-cs0-pc-pin { |
| 226 | + pins = "PC3"; |
| 227 | + function = "spi0"; |
| 228 | + allwinner,pinmux = <4>; |
| 229 | + }; |
| 230 | + |
| 231 | + /omit-if-no-ref/ |
| 232 | + spi0_cs1_pc_pin: spi0-cs1-pc-pin { |
| 233 | + pins = "PC7"; |
| 234 | + function = "spi0"; |
| 235 | + allwinner,pinmux = <4>; |
| 236 | + }; |
| 237 | + |
| 238 | + /omit-if-no-ref/ |
| 239 | + spi0_hold_pc_pin: spi0-hold-pc-pin { |
| 240 | + /* conflicts with eMMC D7 */ |
| 241 | + pins = "PC16"; |
| 242 | + function = "spi0"; |
| 243 | + allwinner,pinmux = <4>; |
| 244 | + }; |
| 245 | + |
| 246 | + /omit-if-no-ref/ |
| 247 | + spi0_wp_pc_pin: spi0-wp-pc-pin { |
| 248 | + /* conflicts with eMMC D2 */ |
| 249 | + pins = "PC15"; |
| 250 | + function = "spi0"; |
| 251 | + allwinner,pinmux = <4>; |
| 252 | + }; |
| 253 | + |
217 | 254 | uart0_pb_pins: uart0-pb-pins { |
218 | 255 | pins = "PB9", "PB10"; |
219 | 256 | allwinner,pinmux = <2>; |
|
563 | 600 | #size-cells = <0>; |
564 | 601 | }; |
565 | 602 |
|
| 603 | + spi0: spi@4025000 { |
| 604 | + compatible = "allwinner,sun55i-a523-spi"; |
| 605 | + reg = <0x04025000 0x1000>; |
| 606 | + interrupts = <GIC_SPI 16 IRQ_TYPE_LEVEL_HIGH>; |
| 607 | + clocks = <&ccu CLK_BUS_SPI0>, <&ccu CLK_SPI0>; |
| 608 | + clock-names = "ahb", "mod"; |
| 609 | + dmas = <&dma 22>, <&dma 22>; |
| 610 | + dma-names = "rx", "tx"; |
| 611 | + resets = <&ccu RST_BUS_SPI0>; |
| 612 | + status = "disabled"; |
| 613 | + #address-cells = <1>; |
| 614 | + #size-cells = <0>; |
| 615 | + }; |
| 616 | + |
| 617 | + spi1: spi@4026000 { |
| 618 | + compatible = "allwinner,sun55i-a523-spi-dbi", |
| 619 | + "allwinner,sun55i-a523-spi"; |
| 620 | + reg = <0x04026000 0x1000>; |
| 621 | + interrupts = <GIC_SPI 17 IRQ_TYPE_LEVEL_HIGH>; |
| 622 | + clocks = <&ccu CLK_BUS_SPI1>, <&ccu CLK_SPI1>; |
| 623 | + clock-names = "ahb", "mod"; |
| 624 | + dmas = <&dma 23>, <&dma 23>; |
| 625 | + dma-names = "rx", "tx"; |
| 626 | + resets = <&ccu RST_BUS_SPI1>; |
| 627 | + status = "disabled"; |
| 628 | + #address-cells = <1>; |
| 629 | + #size-cells = <0>; |
| 630 | + }; |
| 631 | + |
| 632 | + spi2: spi@4027000 { |
| 633 | + compatible = "allwinner,sun55i-a523-spi"; |
| 634 | + reg = <0x04027000 0x1000>; |
| 635 | + interrupts = <GIC_SPI 18 IRQ_TYPE_LEVEL_HIGH>; |
| 636 | + clocks = <&ccu CLK_BUS_SPI2>, <&ccu CLK_SPI2>; |
| 637 | + clock-names = "ahb", "mod"; |
| 638 | + dmas = <&dma 24>, <&dma 24>; |
| 639 | + dma-names = "rx", "tx"; |
| 640 | + resets = <&ccu RST_BUS_SPI2>; |
| 641 | + status = "disabled"; |
| 642 | + #address-cells = <1>; |
| 643 | + #size-cells = <0>; |
| 644 | + }; |
| 645 | + |
566 | 646 | usb_otg: usb@4100000 { |
567 | 647 | compatible = "allwinner,sun55i-a523-musb", |
568 | 648 | "allwinner,sun8i-a33-musb"; |
|
815 | 895 | #clock-cells = <1>; |
816 | 896 | }; |
817 | 897 |
|
| 898 | + r_spi0: spi@7092000 { |
| 899 | + compatible = "allwinner,sun55i-a523-spi"; |
| 900 | + reg = <0x07092000 0x1000>; |
| 901 | + interrupts = <GIC_SPI 172 IRQ_TYPE_LEVEL_HIGH>; |
| 902 | + clocks = <&r_ccu CLK_BUS_R_SPI>, <&r_ccu CLK_R_SPI>; |
| 903 | + clock-names = "ahb", "mod"; |
| 904 | + dmas = <&dma 53>, <&dma 53>; |
| 905 | + dma-names = "rx", "tx"; |
| 906 | + resets = <&r_ccu RST_BUS_R_SPI>; |
| 907 | + status = "disabled"; |
| 908 | + #address-cells = <1>; |
| 909 | + #size-cells = <0>; |
| 910 | + }; |
| 911 | + |
818 | 912 | mcu_ccu: clock-controller@7102000 { |
819 | 913 | compatible = "allwinner,sun55i-a523-mcu-ccu"; |
820 | 914 | reg = <0x7102000 0x200>; |
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