|
44 | 44 | compatible = "pinctrl-single"; |
45 | 45 | reg = <0x0014029c 0x26c>; |
46 | 46 | #address-cells = <1>; |
47 | | - #size-cells = <1>; |
| 47 | + #size-cells = <0>; |
48 | 48 | pinctrl-single,register-width = <32>; |
49 | 49 | pinctrl-single,function-mask = <0xf>; |
50 | 50 | pinctrl-single,gpio-range = < |
|
56 | 56 | }; |
57 | 57 |
|
58 | 58 | /* pinctrl functions */ |
59 | | - tsio_pins: pinmux_gpio_14 { |
| 59 | + tsio_pins: gpio-14-pins { |
60 | 60 | pinctrl-single,pins = < |
61 | 61 | 0x038 MODE_NITRO /* tsio_0 */ |
62 | 62 | 0x03c MODE_NITRO /* tsio_1 */ |
63 | 63 | >; |
64 | 64 | }; |
65 | 65 |
|
66 | | - nor_pins: pinmux_pnor_adv_n { |
| 66 | + nor_pins: pnor-adv-n-pins { |
67 | 67 | pinctrl-single,pins = < |
68 | 68 | 0x0ac MODE_PNOR /* nand_ce1_n */ |
69 | 69 | 0x0b0 MODE_PNOR /* nand_ce0_n */ |
|
119 | 119 | >; |
120 | 120 | }; |
121 | 121 |
|
122 | | - nand_pins: pinmux_nand_ce1_n { |
| 122 | + nand_pins: nand-ce1-n-pins { |
123 | 123 | pinctrl-single,pins = < |
124 | 124 | 0x0ac MODE_NAND /* nand_ce1_n */ |
125 | 125 | 0x0b0 MODE_NAND /* nand_ce0_n */ |
|
148 | 148 | >; |
149 | 149 | }; |
150 | 150 |
|
151 | | - pwm0_pins: pinmux_pwm_0 { |
| 151 | + pwm0_pins: pwm-0-pins { |
152 | 152 | pinctrl-single,pins = < |
153 | 153 | 0x10c MODE_NITRO |
154 | 154 | >; |
155 | 155 | }; |
156 | 156 |
|
157 | | - pwm1_pins: pinmux_pwm_1 { |
| 157 | + pwm1_pins: pwm-1-pins { |
158 | 158 | pinctrl-single,pins = < |
159 | 159 | 0x110 MODE_NITRO |
160 | 160 | >; |
161 | 161 | }; |
162 | 162 |
|
163 | | - pwm2_pins: pinmux_pwm_2 { |
| 163 | + pwm2_pins: pwm-2-pins { |
164 | 164 | pinctrl-single,pins = < |
165 | 165 | 0x114 MODE_NITRO |
166 | 166 | >; |
167 | 167 | }; |
168 | 168 |
|
169 | | - pwm3_pins: pinmux_pwm_3 { |
| 169 | + pwm3_pins: pwm-3-pins { |
170 | 170 | pinctrl-single,pins = < |
171 | 171 | 0x118 MODE_NITRO |
172 | 172 | >; |
173 | 173 | }; |
174 | 174 |
|
175 | | - dbu_rxd_pins: pinmux_uart1_sin_nitro { |
| 175 | + dbu_rxd_pins: uart1-sin-nitro-pins { |
176 | 176 | pinctrl-single,pins = < |
177 | 177 | 0x11c MODE_NITRO /* dbu_rxd */ |
178 | 178 | 0x120 MODE_NITRO /* dbu_txd */ |
179 | 179 | >; |
180 | 180 | }; |
181 | 181 |
|
182 | | - uart1_pins: pinmux_uart1_sin_nand { |
| 182 | + uart1_pins: uart1-sin-nand-pins { |
183 | 183 | pinctrl-single,pins = < |
184 | 184 | 0x11c MODE_NAND /* uart1_sin */ |
185 | 185 | 0x120 MODE_NAND /* uart1_out */ |
186 | 186 | >; |
187 | 187 | }; |
188 | 188 |
|
189 | | - uart2_pins: pinmux_uart2_sin { |
| 189 | + uart2_pins: uart2-sin-pins { |
190 | 190 | pinctrl-single,pins = < |
191 | 191 | 0x124 MODE_NITRO /* uart2_sin */ |
192 | 192 | 0x128 MODE_NITRO /* uart2_out */ |
193 | 193 | >; |
194 | 194 | }; |
195 | 195 |
|
196 | | - uart3_pins: pinmux_uart3_sin { |
| 196 | + uart3_pins: uart3-sin-pins { |
197 | 197 | pinctrl-single,pins = < |
198 | 198 | 0x12c MODE_NITRO /* uart3_sin */ |
199 | 199 | 0x130 MODE_NITRO /* uart3_out */ |
200 | 200 | >; |
201 | 201 | }; |
202 | 202 |
|
203 | | - i2s_pins: pinmux_i2s_bitclk { |
| 203 | + i2s_pins: i2s-bitclk-pins { |
204 | 204 | pinctrl-single,pins = < |
205 | 205 | 0x134 MODE_NITRO /* i2s_bitclk */ |
206 | 206 | 0x138 MODE_NITRO /* i2s_sdout */ |
|
211 | 211 | >; |
212 | 212 | }; |
213 | 213 |
|
214 | | - qspi_pins: pinumx_qspi_hold_n { |
| 214 | + qspi_pins: qspi-hold-n-pins { |
215 | 215 | pinctrl-single,pins = < |
216 | 216 | 0x14c MODE_NAND /* qspi_hold_n */ |
217 | 217 | 0x150 MODE_NAND /* qspi_wp_n */ |
|
222 | 222 | >; |
223 | 223 | }; |
224 | 224 |
|
225 | | - mdio_pins: pinumx_ext_mdio { |
| 225 | + mdio_pins: ext-mdio-pins { |
226 | 226 | pinctrl-single,pins = < |
227 | 227 | 0x164 MODE_NITRO /* ext_mdio */ |
228 | 228 | 0x168 MODE_NITRO /* ext_mdc */ |
229 | 229 | >; |
230 | 230 | }; |
231 | 231 |
|
232 | | - i2c0_pins: pinmux_i2c0_sda { |
| 232 | + i2c0_pins: i2c0-sda-pins { |
233 | 233 | pinctrl-single,pins = < |
234 | 234 | 0x16c MODE_NITRO /* i2c0_sda */ |
235 | 235 | 0x170 MODE_NITRO /* i2c0_scl */ |
236 | 236 | >; |
237 | 237 | }; |
238 | 238 |
|
239 | | - i2c1_pins: pinmux_i2c1_sda { |
| 239 | + i2c1_pins: i2c1-sda-pins { |
240 | 240 | pinctrl-single,pins = < |
241 | 241 | 0x174 MODE_NITRO /* i2c1_sda */ |
242 | 242 | 0x178 MODE_NITRO /* i2c1_scl */ |
243 | 243 | >; |
244 | 244 | }; |
245 | 245 |
|
246 | | - sdio0_pins: pinmux_sdio0_cd_l { |
| 246 | + sdio0_pins: sdio0-cd-l-pins { |
247 | 247 | pinctrl-single,pins = < |
248 | 248 | 0x17c MODE_NITRO /* sdio0_cd_l */ |
249 | 249 | 0x180 MODE_NITRO /* sdio0_clk_sdcard */ |
|
262 | 262 | >; |
263 | 263 | }; |
264 | 264 |
|
265 | | - sdio1_pins: pinmux_sdio1_cd_l { |
| 265 | + sdio1_pins: sdio1-cd-l-pins { |
266 | 266 | pinctrl-single,pins = < |
267 | 267 | 0x1b4 MODE_NITRO /* sdio1_cd_l */ |
268 | 268 | 0x1b8 MODE_NITRO /* sdio1_clk_sdcard */ |
|
281 | 281 | >; |
282 | 282 | }; |
283 | 283 |
|
284 | | - spi0_pins: pinmux_spi0_sck_nand { |
| 284 | + spi0_pins: spi0-sck-nand-pins { |
285 | 285 | pinctrl-single,pins = < |
286 | 286 | 0x1ec MODE_NITRO /* spi0_sck */ |
287 | 287 | 0x1f0 MODE_NITRO /* spi0_rxd */ |
|
290 | 290 | >; |
291 | 291 | }; |
292 | 292 |
|
293 | | - spi1_pins: pinmux_spi1_sck_nand { |
| 293 | + spi1_pins: spi1-sck-nand-pins { |
294 | 294 | pinctrl-single,pins = < |
295 | 295 | 0x1fc MODE_NITRO /* spi1_sck */ |
296 | 296 | 0x200 MODE_NITRO /* spi1_rxd */ |
|
299 | 299 | >; |
300 | 300 | }; |
301 | 301 |
|
302 | | - nuart_pins: pinmux_uart0_sin_nitro { |
| 302 | + nuart_pins: uart0-sin-nitro-pins { |
303 | 303 | pinctrl-single,pins = < |
304 | 304 | 0x20c MODE_NITRO /* nuart_rxd */ |
305 | 305 | 0x210 MODE_NITRO /* nuart_txd */ |
306 | 306 | >; |
307 | 307 | }; |
308 | 308 |
|
309 | | - uart0_pins: pinumux_uart0_sin_nand { |
| 309 | + uart0_pins: uart0-sin-nand-pins { |
310 | 310 | pinctrl-single,pins = < |
311 | 311 | 0x20c MODE_NAND /* uart0_sin */ |
312 | 312 | 0x210 MODE_NAND /* uart0_out */ |
|
319 | 319 | >; |
320 | 320 | }; |
321 | 321 |
|
322 | | - drdu2_pins: pinmux_drdu2_overcurrent { |
| 322 | + drdu2_pins: drdu2-overcurrent-pins { |
323 | 323 | pinctrl-single,pins = < |
324 | 324 | 0x22c MODE_NITRO /* drdu2_overcurrent */ |
325 | 325 | 0x230 MODE_NITRO /* drdu2_vbus_ppc */ |
|
328 | 328 | >; |
329 | 329 | }; |
330 | 330 |
|
331 | | - drdu3_pins: pinmux_drdu3_overcurrent { |
| 331 | + drdu3_pins: drdu3-overcurrent-pins { |
332 | 332 | pinctrl-single,pins = < |
333 | 333 | 0x23c MODE_NITRO /* drdu3_overcurrent */ |
334 | 334 | 0x240 MODE_NITRO /* drdu3_vbus_ppc */ |
|
337 | 337 | >; |
338 | 338 | }; |
339 | 339 |
|
340 | | - usb3h_pins: pinmux_usb3h_overcurrent { |
| 340 | + usb3h_pins: usb3h-overcurrent-pins { |
341 | 341 | pinctrl-single,pins = < |
342 | 342 | 0x24c MODE_NITRO /* usb3h_overcurrent */ |
343 | 343 | 0x250 MODE_NITRO /* usb3h_vbus_ppc */ |
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