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Enric Balletbo i Serrammind
Enric Balletbo i Serra
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mmind
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dt-bindings: power: rockchip: Convert to json-schema
Convert the soc/rockchip/power_domain.txt binding document to json-schema and move to the power bindings directory. Signed-off-by: Enric Balletbo i Serra <enric.balletbo@collabora.com> Signed-off-by: Elaine Zhang <zhangqing@rock-chips.com> Signed-off-by: Johan Jonker <jbx6244@gmail.com> Reviewed-by: Rob Herring <robh@kernel.org> Link: https://lore.kernel.org/r/20210417112952.8516-14-jbx6244@gmail.com Signed-off-by: Heiko Stuebner <heiko@sntech.de>
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‎Documentation/devicetree/bindings/power/rockchip,power-controller.yaml‎

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# SPDX-License-Identifier: GPL-2.0
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%YAML 1.2
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---
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$id: http://devicetree.org/schemas/power/rockchip,power-controller.yaml#
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$schema: http://devicetree.org/meta-schemas/core.yaml#
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title: Rockchip Power Domains
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maintainers:
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- Elaine Zhang <zhangqing@rock-chips.com>
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- Heiko Stuebner <heiko@sntech.de>
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description: |
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Rockchip processors include support for multiple power domains
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which can be powered up/down by software based on different
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application scenarios to save power.
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Power domains contained within power-controller node are
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generic power domain providers documented in
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Documentation/devicetree/bindings/power/power-domain.yaml.
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IP cores belonging to a power domain should contain a
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"power-domains" property that is a phandle for the
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power domain node representing the domain.
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properties:
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$nodename:
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const: power-controller
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compatible:
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enum:
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- rockchip,px30-power-controller
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- rockchip,rk3036-power-controller
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- rockchip,rk3066-power-controller
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- rockchip,rk3128-power-controller
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- rockchip,rk3188-power-controller
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- rockchip,rk3228-power-controller
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- rockchip,rk3288-power-controller
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- rockchip,rk3328-power-controller
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- rockchip,rk3366-power-controller
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- rockchip,rk3368-power-controller
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- rockchip,rk3399-power-controller
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"#power-domain-cells":
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const: 1
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"#address-cells":
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const: 1
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"#size-cells":
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const: 0
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required:
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- compatible
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- "#power-domain-cells"
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additionalProperties: false
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patternProperties:
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"^power-domain@[0-9a-f]+$":
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$ref: "#/$defs/pd-node"
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unevaluatedProperties: false
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properties:
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"#address-cells":
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const: 1
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"#size-cells":
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const: 0
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patternProperties:
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"^power-domain@[0-9a-f]+$":
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$ref: "#/$defs/pd-node"
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unevaluatedProperties: false
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properties:
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"#address-cells":
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const: 1
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"#size-cells":
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const: 0
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patternProperties:
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"^power-domain@[0-9a-f]+$":
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$ref: "#/$defs/pd-node"
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unevaluatedProperties: false
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properties:
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"#power-domain-cells":
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const: 0
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$defs:
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pd-node:
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type: object
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description: |
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Represents the power domains within the power controller node.
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properties:
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reg:
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maxItems: 1
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description: |
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Power domain index. Valid values are defined in
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"include/dt-bindings/power/px30-power.h"
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"include/dt-bindings/power/rk3036-power.h"
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"include/dt-bindings/power/rk3066-power.h"
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"include/dt-bindings/power/rk3128-power.h"
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"include/dt-bindings/power/rk3188-power.h"
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"include/dt-bindings/power/rk3228-power.h"
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"include/dt-bindings/power/rk3288-power.h"
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"include/dt-bindings/power/rk3328-power.h"
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"include/dt-bindings/power/rk3366-power.h"
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"include/dt-bindings/power/rk3368-power.h"
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"include/dt-bindings/power/rk3399-power.h"
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clocks:
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minItems: 1
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maxItems: 30
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description: |
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A number of phandles to clocks that need to be enabled
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while power domain switches state.
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pm_qos:
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$ref: /schemas/types.yaml#/definitions/phandle-array
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description: |
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A number of phandles to qos blocks which need to be saved and restored
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while power domain switches state.
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"#power-domain-cells":
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enum: [0, 1]
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description:
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Must be 0 for nodes representing a single PM domain and 1 for nodes
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providing multiple PM domains.
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required:
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- reg
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- "#power-domain-cells"
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examples:
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- |
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#include <dt-bindings/clock/rk3399-cru.h>
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#include <dt-bindings/power/rk3399-power.h>
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soc {
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#address-cells = <2>;
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#size-cells = <2>;
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qos_hdcp: qos@ffa90000 {
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compatible = "rockchip,rk3399-qos", "syscon";
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reg = <0x0 0xffa90000 0x0 0x20>;
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};
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qos_iep: qos@ffa98000 {
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compatible = "rockchip,rk3399-qos", "syscon";
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reg = <0x0 0xffa98000 0x0 0x20>;
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};
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qos_rga_r: qos@ffab0000 {
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compatible = "rockchip,rk3399-qos", "syscon";
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reg = <0x0 0xffab0000 0x0 0x20>;
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};
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qos_rga_w: qos@ffab0080 {
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compatible = "rockchip,rk3399-qos", "syscon";
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reg = <0x0 0xffab0080 0x0 0x20>;
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};
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qos_video_m0: qos@ffab8000 {
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compatible = "rockchip,rk3399-qos", "syscon";
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reg = <0x0 0xffab8000 0x0 0x20>;
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};
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qos_video_m1_r: qos@ffac0000 {
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compatible = "rockchip,rk3399-qos", "syscon";
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reg = <0x0 0xffac0000 0x0 0x20>;
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};
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qos_video_m1_w: qos@ffac0080 {
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compatible = "rockchip,rk3399-qos", "syscon";
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reg = <0x0 0xffac0080 0x0 0x20>;
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};
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power-management@ff310000 {
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compatible = "rockchip,rk3399-pmu", "syscon", "simple-mfd";
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reg = <0x0 0xff310000 0x0 0x1000>;
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power-controller {
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compatible = "rockchip,rk3399-power-controller";
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#power-domain-cells = <1>;
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#address-cells = <1>;
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#size-cells = <0>;
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/* These power domains are grouped by VD_CENTER */
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power-domain@RK3399_PD_IEP {
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reg = <RK3399_PD_IEP>;
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clocks = <&cru ACLK_IEP>,
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<&cru HCLK_IEP>;
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pm_qos = <&qos_iep>;
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#power-domain-cells = <0>;
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};
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power-domain@RK3399_PD_RGA {
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reg = <RK3399_PD_RGA>;
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clocks = <&cru ACLK_RGA>,
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<&cru HCLK_RGA>;
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pm_qos = <&qos_rga_r>,
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<&qos_rga_w>;
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#power-domain-cells = <0>;
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};
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power-domain@RK3399_PD_VCODEC {
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reg = <RK3399_PD_VCODEC>;
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clocks = <&cru ACLK_VCODEC>,
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<&cru HCLK_VCODEC>;
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pm_qos = <&qos_video_m0>;
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#power-domain-cells = <0>;
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};
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power-domain@RK3399_PD_VDU {
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reg = <RK3399_PD_VDU>;
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clocks = <&cru ACLK_VDU>,
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<&cru HCLK_VDU>;
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pm_qos = <&qos_video_m1_r>,
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<&qos_video_m1_w>;
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#power-domain-cells = <0>;
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};
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power-domain@RK3399_PD_VIO {
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reg = <RK3399_PD_VIO>;
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#power-domain-cells = <1>;
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#address-cells = <1>;
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#size-cells = <0>;
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power-domain@RK3399_PD_HDCP {
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reg = <RK3399_PD_HDCP>;
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clocks = <&cru ACLK_HDCP>,
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<&cru HCLK_HDCP>,
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<&cru PCLK_HDCP>;
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pm_qos = <&qos_hdcp>;
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#power-domain-cells = <0>;
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};
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};
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};
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};
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};

‎Documentation/devicetree/bindings/soc/rockchip/power_domain.txt‎

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