Skip to content

Commit d7595dd

Browse files
AngeloGioacchino Del Regnobebarino
authored andcommitted
clk: mediatek: clk-mt8183: Join top_aud_muxes and top_aud_divs
Join the two to register them in one shot. Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> Reviewed-by: Chen-Yu Tsai <wenst@chromium.org> Link: https://lore.kernel.org/r/20230120092053.182923-18-angelogioacchino.delregno@collabora.com Tested-by: Mingming Su <mingming.su@mediatek.com> Signed-off-by: Stephen Boyd <sboyd@kernel.org>
1 parent 66c8773 commit d7595dd

1 file changed

Lines changed: 15 additions & 22 deletions

File tree

drivers/clk/mediatek/clk-mt8183.c

Lines changed: 15 additions & 22 deletions
Original file line numberDiff line numberDiff line change
@@ -613,21 +613,6 @@ static const char * const apll_i2s5_parents[] = {
613613
"aud_2_sel"
614614
};
615615

616-
static struct mtk_composite top_aud_muxes[] = {
617-
MUX(CLK_TOP_MUX_APLL_I2S0, "apll_i2s0_sel", apll_i2s0_parents,
618-
0x320, 8, 1),
619-
MUX(CLK_TOP_MUX_APLL_I2S1, "apll_i2s1_sel", apll_i2s1_parents,
620-
0x320, 9, 1),
621-
MUX(CLK_TOP_MUX_APLL_I2S2, "apll_i2s2_sel", apll_i2s2_parents,
622-
0x320, 10, 1),
623-
MUX(CLK_TOP_MUX_APLL_I2S3, "apll_i2s3_sel", apll_i2s3_parents,
624-
0x320, 11, 1),
625-
MUX(CLK_TOP_MUX_APLL_I2S4, "apll_i2s4_sel", apll_i2s4_parents,
626-
0x320, 12, 1),
627-
MUX(CLK_TOP_MUX_APLL_I2S5, "apll_i2s5_sel", apll_i2s5_parents,
628-
0x328, 20, 1),
629-
};
630-
631616
static const char * const mcu_mp0_parents[] = {
632617
"clk26m",
633618
"armpll_ll",
@@ -658,7 +643,19 @@ static struct mtk_composite mcu_muxes[] = {
658643
MUX(CLK_MCU_BUS_SEL, "mcu_bus_sel", mcu_bus_parents, 0x7C0, 9, 2),
659644
};
660645

661-
static struct mtk_composite top_aud_divs[] = {
646+
static struct mtk_composite top_aud_comp[] = {
647+
MUX(CLK_TOP_MUX_APLL_I2S0, "apll_i2s0_sel", apll_i2s0_parents,
648+
0x320, 8, 1),
649+
MUX(CLK_TOP_MUX_APLL_I2S1, "apll_i2s1_sel", apll_i2s1_parents,
650+
0x320, 9, 1),
651+
MUX(CLK_TOP_MUX_APLL_I2S2, "apll_i2s2_sel", apll_i2s2_parents,
652+
0x320, 10, 1),
653+
MUX(CLK_TOP_MUX_APLL_I2S3, "apll_i2s3_sel", apll_i2s3_parents,
654+
0x320, 11, 1),
655+
MUX(CLK_TOP_MUX_APLL_I2S4, "apll_i2s4_sel", apll_i2s4_parents,
656+
0x320, 12, 1),
657+
MUX(CLK_TOP_MUX_APLL_I2S5, "apll_i2s5_sel", apll_i2s5_parents,
658+
0x328, 20, 1),
662659
DIV_GATE(CLK_TOP_APLL12_DIV0, "apll12_div0", "apll_i2s0_sel",
663660
0x320, 2, 0x324, 8, 0),
664661
DIV_GATE(CLK_TOP_APLL12_DIV1, "apll12_div1", "apll_i2s1_sel",
@@ -1170,12 +1167,8 @@ static int clk_mt8183_top_probe(struct platform_device *pdev)
11701167
ARRAY_SIZE(top_muxes), node,
11711168
&mt8183_clk_lock, top_clk_data);
11721169

1173-
mtk_clk_register_composites(&pdev->dev, top_aud_muxes,
1174-
ARRAY_SIZE(top_aud_muxes), base,
1175-
&mt8183_clk_lock, top_clk_data);
1176-
1177-
mtk_clk_register_composites(&pdev->dev, top_aud_divs,
1178-
ARRAY_SIZE(top_aud_divs), base,
1170+
mtk_clk_register_composites(&pdev->dev, top_aud_comp,
1171+
ARRAY_SIZE(top_aud_comp), base,
11791172
&mt8183_clk_lock, top_clk_data);
11801173

11811174
mtk_clk_register_gates(&pdev->dev, node, top_clks,

0 commit comments

Comments
 (0)