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Merge branch 'pm-cpufreq'
Merge cpufreq updates for 5.19-rc1: - Fix cpufreq governor clean up code to avoid using kfree() directly to free kobject-based items (Kevin Hao). - Prepare cpufreq for powerpc's asm/prom.h cleanup (Christophe Leroy). - Make intel_pstate notify frequency invariance code when no_turbo is turned on and off (Chen Yu). - Add Sapphire Rapids OOB mode support to intel_pstate (Srinivas Pandruvada). - Make cpufreq avoid unnecessary frequency updates due to mismatch between hardware and the frequency table (Viresh Kumar). - Make remove_cpu_dev_symlink() clear the real_cpus mask to simplify code (Viresh Kumar). - Rearrange cpufreq_offline() and cpufreq_remove_dev() to make the calling convention for some driver callbacks consistent (Rafael Wysocki). - Avoid accessing half-initialized cpufreq policies from the show() and store() sysfs functions (Schspa Shi). - Rearrange cpufreq_offline() to make the calling convention for some driver callbacks consistent (Schspa Shi). - Update CPPC handling in cpufreq (Pierre Gondois): * Add per_cpu efficiency_class to the CPPC driver. * Make the CPPC driver Register EM based on efficiency class information. * Adjust _OSC for flexible address space in the ACPI platform initialization code and always set CPPC _OSC bits if CPPC_LIB is supported. * Assume no transition latency if no PCCT in the CPPC driver. * Add fast_switch and dvfs_possible_from_any_cpu support to the CPPC driver. * pm-cpufreq: cpufreq: CPPC: Enable dvfs_possible_from_any_cpu cpufreq: CPPC: Enable fast_switch ACPI: CPPC: Assume no transition latency if no PCCT ACPI: bus: Set CPPC _OSC bits for all and when CPPC_LIB is supported ACPI: CPPC: Check _OSC for flexible address space cpufreq: make interface functions and lock holding state clear cpufreq: Abort show()/store() for half-initialized policies cpufreq: Rearrange locking in cpufreq_remove_dev() cpufreq: Split cpufreq_offline() cpufreq: Reorganize checks in cpufreq_offline() cpufreq: Clear real_cpus mask from remove_cpu_dev_symlink() cpufreq: intel_pstate: Support Sapphire Rapids OOB mode Revert "cpufreq: Fix possible race in cpufreq online error path" cpufreq: CPPC: Register EM based on efficiency class information cpufreq: CPPC: Add per_cpu efficiency_class cpufreq: Avoid unnecessary frequency updates due to mismatch cpufreq: Fix possible race in cpufreq online error path cpufreq: intel_pstate: Handle no_turbo in frequency invariance cpufreq: Prepare cleanup of powerpc's asm/prom.h cpufreq: governor: Use kobject release() method to free dbs_data
2 parents 16a23f3 + 2d41dc2 commit d988c91

15 files changed

Lines changed: 376 additions & 64 deletions

arch/arm64/kernel/smp.c

Lines changed: 1 addition & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -512,6 +512,7 @@ struct acpi_madt_generic_interrupt *acpi_cpu_get_madt_gicc(int cpu)
512512
{
513513
return &cpu_madt_gicc[cpu];
514514
}
515+
EXPORT_SYMBOL_GPL(acpi_cpu_get_madt_gicc);
515516

516517
/*
517518
* acpi_map_gic_cpu_interface - parse processor MADT entry

drivers/acpi/bus.c

Lines changed: 26 additions & 8 deletions
Original file line numberDiff line numberDiff line change
@@ -278,6 +278,20 @@ bool osc_sb_apei_support_acked;
278278
bool osc_pc_lpi_support_confirmed;
279279
EXPORT_SYMBOL_GPL(osc_pc_lpi_support_confirmed);
280280

281+
/*
282+
* ACPI 6.2 Section 6.2.11.2 'Platform-Wide OSPM Capabilities':
283+
* Starting with ACPI Specification 6.2, all _CPC registers can be in
284+
* PCC, System Memory, System IO, or Functional Fixed Hardware address
285+
* spaces. OSPM support for this more flexible register space scheme is
286+
* indicated by the “Flexible Address Space for CPPC Registers” _OSC bit.
287+
*
288+
* Otherwise (cf ACPI 6.1, s8.4.7.1.1.X), _CPC registers must be in:
289+
* - PCC or Functional Fixed Hardware address space if defined
290+
* - SystemMemory address space (NULL register) if not defined
291+
*/
292+
bool osc_cpc_flexible_adr_space_confirmed;
293+
EXPORT_SYMBOL_GPL(osc_cpc_flexible_adr_space_confirmed);
294+
281295
/*
282296
* ACPI 6.4 Operating System Capabilities for USB.
283297
*/
@@ -315,12 +329,15 @@ static void acpi_bus_osc_negotiate_platform_control(void)
315329
#endif
316330
#ifdef CONFIG_X86
317331
capbuf[OSC_SUPPORT_DWORD] |= OSC_SB_GENERIC_INITIATOR_SUPPORT;
318-
if (boot_cpu_has(X86_FEATURE_HWP)) {
319-
capbuf[OSC_SUPPORT_DWORD] |= OSC_SB_CPC_SUPPORT;
320-
capbuf[OSC_SUPPORT_DWORD] |= OSC_SB_CPCV2_SUPPORT;
321-
}
322332
#endif
323333

334+
#ifdef CONFIG_ACPI_CPPC_LIB
335+
capbuf[OSC_SUPPORT_DWORD] |= OSC_SB_CPC_SUPPORT;
336+
capbuf[OSC_SUPPORT_DWORD] |= OSC_SB_CPCV2_SUPPORT;
337+
#endif
338+
339+
capbuf[OSC_SUPPORT_DWORD] |= OSC_SB_CPC_FLEXIBLE_ADR_SPACE;
340+
324341
if (IS_ENABLED(CONFIG_SCHED_MC_PRIO))
325342
capbuf[OSC_SUPPORT_DWORD] |= OSC_SB_CPC_DIVERSE_HIGH_SUPPORT;
326343

@@ -341,10 +358,9 @@ static void acpi_bus_osc_negotiate_platform_control(void)
341358
return;
342359
}
343360

344-
#ifdef CONFIG_X86
345-
if (boot_cpu_has(X86_FEATURE_HWP))
346-
osc_sb_cppc_not_supported = !(capbuf_ret[OSC_SUPPORT_DWORD] &
347-
(OSC_SB_CPC_SUPPORT | OSC_SB_CPCV2_SUPPORT));
361+
#ifdef CONFIG_ACPI_CPPC_LIB
362+
osc_sb_cppc_not_supported = !(capbuf_ret[OSC_SUPPORT_DWORD] &
363+
(OSC_SB_CPC_SUPPORT | OSC_SB_CPCV2_SUPPORT));
348364
#endif
349365

350366
/*
@@ -366,6 +382,8 @@ static void acpi_bus_osc_negotiate_platform_control(void)
366382
capbuf_ret[OSC_SUPPORT_DWORD] & OSC_SB_PCLPI_SUPPORT;
367383
osc_sb_native_usb4_support_confirmed =
368384
capbuf_ret[OSC_SUPPORT_DWORD] & OSC_SB_NATIVE_USB4_SUPPORT;
385+
osc_cpc_flexible_adr_space_confirmed =
386+
capbuf_ret[OSC_SUPPORT_DWORD] & OSC_SB_CPC_FLEXIBLE_ADR_SPACE;
369387
}
370388

371389
kfree(context.ret.pointer);

drivers/acpi/cppc_acpi.c

Lines changed: 43 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -100,6 +100,16 @@ static DEFINE_PER_CPU(struct cpc_desc *, cpc_desc_ptr);
100100
(cpc)->cpc_entry.reg.space_id == \
101101
ACPI_ADR_SPACE_PLATFORM_COMM)
102102

103+
/* Check if a CPC register is in SystemMemory */
104+
#define CPC_IN_SYSTEM_MEMORY(cpc) ((cpc)->type == ACPI_TYPE_BUFFER && \
105+
(cpc)->cpc_entry.reg.space_id == \
106+
ACPI_ADR_SPACE_SYSTEM_MEMORY)
107+
108+
/* Check if a CPC register is in SystemIo */
109+
#define CPC_IN_SYSTEM_IO(cpc) ((cpc)->type == ACPI_TYPE_BUFFER && \
110+
(cpc)->cpc_entry.reg.space_id == \
111+
ACPI_ADR_SPACE_SYSTEM_IO)
112+
103113
/* Evaluates to True if reg is a NULL register descriptor */
104114
#define IS_NULL_REG(reg) ((reg)->space_id == ACPI_ADR_SPACE_SYSTEM_MEMORY && \
105115
(reg)->address == 0 && \
@@ -424,6 +434,24 @@ bool acpi_cpc_valid(void)
424434
}
425435
EXPORT_SYMBOL_GPL(acpi_cpc_valid);
426436

437+
bool cppc_allow_fast_switch(void)
438+
{
439+
struct cpc_register_resource *desired_reg;
440+
struct cpc_desc *cpc_ptr;
441+
int cpu;
442+
443+
for_each_possible_cpu(cpu) {
444+
cpc_ptr = per_cpu(cpc_desc_ptr, cpu);
445+
desired_reg = &cpc_ptr->cpc_regs[DESIRED_PERF];
446+
if (!CPC_IN_SYSTEM_MEMORY(desired_reg) &&
447+
!CPC_IN_SYSTEM_IO(desired_reg))
448+
return false;
449+
}
450+
451+
return true;
452+
}
453+
EXPORT_SYMBOL_GPL(cppc_allow_fast_switch);
454+
427455
/**
428456
* acpi_get_psd_map - Map the CPUs in the freq domain of a given cpu
429457
* @cpu: Find all CPUs that share a domain with cpu.
@@ -736,6 +764,11 @@ int acpi_cppc_processor_probe(struct acpi_processor *pr)
736764
if (gas_t->address) {
737765
void __iomem *addr;
738766

767+
if (!osc_cpc_flexible_adr_space_confirmed) {
768+
pr_debug("Flexible address space capability not supported\n");
769+
goto out_free;
770+
}
771+
739772
addr = ioremap(gas_t->address, gas_t->bit_width/8);
740773
if (!addr)
741774
goto out_free;
@@ -758,6 +791,10 @@ int acpi_cppc_processor_probe(struct acpi_processor *pr)
758791
gas_t->address);
759792
goto out_free;
760793
}
794+
if (!osc_cpc_flexible_adr_space_confirmed) {
795+
pr_debug("Flexible address space capability not supported\n");
796+
goto out_free;
797+
}
761798
} else {
762799
if (gas_t->space_id != ACPI_ADR_SPACE_FIXED_HARDWARE || !cpc_ffh_supported()) {
763800
/* Support only PCC, SystemMemory, SystemIO, and FFH type regs. */
@@ -1447,6 +1484,9 @@ EXPORT_SYMBOL_GPL(cppc_set_perf);
14471484
* transition latency for performance change requests. The closest we have
14481485
* is the timing information from the PCCT tables which provides the info
14491486
* on the number and frequency of PCC commands the platform can handle.
1487+
*
1488+
* If desired_reg is in the SystemMemory or SystemIo ACPI address space,
1489+
* then assume there is no latency.
14501490
*/
14511491
unsigned int cppc_get_transition_latency(int cpu_num)
14521492
{
@@ -1472,7 +1512,9 @@ unsigned int cppc_get_transition_latency(int cpu_num)
14721512
return CPUFREQ_ETERNAL;
14731513

14741514
desired_reg = &cpc_desc->cpc_regs[DESIRED_PERF];
1475-
if (!CPC_IN_PCC(desired_reg))
1515+
if (CPC_IN_SYSTEM_MEMORY(desired_reg) || CPC_IN_SYSTEM_IO(desired_reg))
1516+
return 0;
1517+
else if (!CPC_IN_PCC(desired_reg))
14761518
return CPUFREQ_ETERNAL;
14771519

14781520
if (pcc_ss_id < 0)

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