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bjorn-helgaasbjorn-helgaas
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PCI: xilinx-cpm: Rename xilinx_cpm_pcie_port to xilinx_cpm_pcie
Rename struct xilinx_cpm_pcie_port to xilinx_cpm_pcie to match the convention of <driver>_pcie. No functional change intended. Link: https://lore.kernel.org/r/20211223011054.1227810-24-helgaas@kernel.org Signed-off-by: Bjorn Helgaas <bhelgaas@google.com> Acked-by: Michal Simek <michal.simek@xilinx.com>
1 parent 0519f73 commit dacee58

1 file changed

Lines changed: 22 additions & 22 deletions

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‎drivers/pci/controller/pcie-xilinx-cpm.c‎

Lines changed: 22 additions & 22 deletions
Original file line numberDiff line numberDiff line change
@@ -99,21 +99,21 @@
9999
#define XILINX_CPM_PCIE_REG_PSCR_LNKUP BIT(11)
100100

101101
/**
102-
* struct xilinx_cpm_pcie_port - PCIe port information
102+
* struct xilinx_cpm_pcie - PCIe port information
103+
* @dev: Device pointer
103104
* @reg_base: Bridge Register Base
104105
* @cpm_base: CPM System Level Control and Status Register(SLCR) Base
105-
* @dev: Device pointer
106106
* @intx_domain: Legacy IRQ domain pointer
107107
* @cpm_domain: CPM IRQ domain pointer
108108
* @cfg: Holds mappings of config space window
109109
* @intx_irq: legacy interrupt number
110110
* @irq: Error interrupt number
111111
* @lock: lock protecting shared register access
112112
*/
113-
struct xilinx_cpm_pcie_port {
113+
struct xilinx_cpm_pcie {
114+
struct device *dev;
114115
void __iomem *reg_base;
115116
void __iomem *cpm_base;
116-
struct device *dev;
117117
struct irq_domain *intx_domain;
118118
struct irq_domain *cpm_domain;
119119
struct pci_config_window *cfg;
@@ -122,24 +122,24 @@ struct xilinx_cpm_pcie_port {
122122
raw_spinlock_t lock;
123123
};
124124

125-
static u32 pcie_read(struct xilinx_cpm_pcie_port *port, u32 reg)
125+
static u32 pcie_read(struct xilinx_cpm_pcie *port, u32 reg)
126126
{
127127
return readl_relaxed(port->reg_base + reg);
128128
}
129129

130-
static void pcie_write(struct xilinx_cpm_pcie_port *port,
130+
static void pcie_write(struct xilinx_cpm_pcie *port,
131131
u32 val, u32 reg)
132132
{
133133
writel_relaxed(val, port->reg_base + reg);
134134
}
135135

136-
static bool cpm_pcie_link_up(struct xilinx_cpm_pcie_port *port)
136+
static bool cpm_pcie_link_up(struct xilinx_cpm_pcie *port)
137137
{
138138
return (pcie_read(port, XILINX_CPM_PCIE_REG_PSCR) &
139139
XILINX_CPM_PCIE_REG_PSCR_LNKUP);
140140
}
141141

142-
static void cpm_pcie_clear_err_interrupts(struct xilinx_cpm_pcie_port *port)
142+
static void cpm_pcie_clear_err_interrupts(struct xilinx_cpm_pcie *port)
143143
{
144144
unsigned long val = pcie_read(port, XILINX_CPM_PCIE_REG_RPEFR);
145145

@@ -153,7 +153,7 @@ static void cpm_pcie_clear_err_interrupts(struct xilinx_cpm_pcie_port *port)
153153

154154
static void xilinx_cpm_mask_leg_irq(struct irq_data *data)
155155
{
156-
struct xilinx_cpm_pcie_port *port = irq_data_get_irq_chip_data(data);
156+
struct xilinx_cpm_pcie *port = irq_data_get_irq_chip_data(data);
157157
unsigned long flags;
158158
u32 mask;
159159
u32 val;
@@ -167,7 +167,7 @@ static void xilinx_cpm_mask_leg_irq(struct irq_data *data)
167167

168168
static void xilinx_cpm_unmask_leg_irq(struct irq_data *data)
169169
{
170-
struct xilinx_cpm_pcie_port *port = irq_data_get_irq_chip_data(data);
170+
struct xilinx_cpm_pcie *port = irq_data_get_irq_chip_data(data);
171171
unsigned long flags;
172172
u32 mask;
173173
u32 val;
@@ -211,7 +211,7 @@ static const struct irq_domain_ops intx_domain_ops = {
211211

212212
static void xilinx_cpm_pcie_intx_flow(struct irq_desc *desc)
213213
{
214-
struct xilinx_cpm_pcie_port *port = irq_desc_get_handler_data(desc);
214+
struct xilinx_cpm_pcie *port = irq_desc_get_handler_data(desc);
215215
struct irq_chip *chip = irq_desc_get_chip(desc);
216216
unsigned long val;
217217
int i;
@@ -229,7 +229,7 @@ static void xilinx_cpm_pcie_intx_flow(struct irq_desc *desc)
229229

230230
static void xilinx_cpm_mask_event_irq(struct irq_data *d)
231231
{
232-
struct xilinx_cpm_pcie_port *port = irq_data_get_irq_chip_data(d);
232+
struct xilinx_cpm_pcie *port = irq_data_get_irq_chip_data(d);
233233
u32 val;
234234

235235
raw_spin_lock(&port->lock);
@@ -241,7 +241,7 @@ static void xilinx_cpm_mask_event_irq(struct irq_data *d)
241241

242242
static void xilinx_cpm_unmask_event_irq(struct irq_data *d)
243243
{
244-
struct xilinx_cpm_pcie_port *port = irq_data_get_irq_chip_data(d);
244+
struct xilinx_cpm_pcie *port = irq_data_get_irq_chip_data(d);
245245
u32 val;
246246

247247
raw_spin_lock(&port->lock);
@@ -273,7 +273,7 @@ static const struct irq_domain_ops event_domain_ops = {
273273

274274
static void xilinx_cpm_pcie_event_flow(struct irq_desc *desc)
275275
{
276-
struct xilinx_cpm_pcie_port *port = irq_desc_get_handler_data(desc);
276+
struct xilinx_cpm_pcie *port = irq_desc_get_handler_data(desc);
277277
struct irq_chip *chip = irq_desc_get_chip(desc);
278278
unsigned long val;
279279
int i;
@@ -327,7 +327,7 @@ static const struct {
327327

328328
static irqreturn_t xilinx_cpm_pcie_intr_handler(int irq, void *dev_id)
329329
{
330-
struct xilinx_cpm_pcie_port *port = dev_id;
330+
struct xilinx_cpm_pcie *port = dev_id;
331331
struct device *dev = port->dev;
332332
struct irq_data *d;
333333

@@ -350,7 +350,7 @@ static irqreturn_t xilinx_cpm_pcie_intr_handler(int irq, void *dev_id)
350350
return IRQ_HANDLED;
351351
}
352352

353-
static void xilinx_cpm_free_irq_domains(struct xilinx_cpm_pcie_port *port)
353+
static void xilinx_cpm_free_irq_domains(struct xilinx_cpm_pcie *port)
354354
{
355355
if (port->intx_domain) {
356356
irq_domain_remove(port->intx_domain);
@@ -369,7 +369,7 @@ static void xilinx_cpm_free_irq_domains(struct xilinx_cpm_pcie_port *port)
369369
*
370370
* Return: '0' on success and error value on failure
371371
*/
372-
static int xilinx_cpm_pcie_init_irq_domain(struct xilinx_cpm_pcie_port *port)
372+
static int xilinx_cpm_pcie_init_irq_domain(struct xilinx_cpm_pcie *port)
373373
{
374374
struct device *dev = port->dev;
375375
struct device_node *node = dev->of_node;
@@ -410,7 +410,7 @@ static int xilinx_cpm_pcie_init_irq_domain(struct xilinx_cpm_pcie_port *port)
410410
return -ENOMEM;
411411
}
412412

413-
static int xilinx_cpm_setup_irq(struct xilinx_cpm_pcie_port *port)
413+
static int xilinx_cpm_setup_irq(struct xilinx_cpm_pcie *port)
414414
{
415415
struct device *dev = port->dev;
416416
struct platform_device *pdev = to_platform_device(dev);
@@ -462,7 +462,7 @@ static int xilinx_cpm_setup_irq(struct xilinx_cpm_pcie_port *port)
462462
* xilinx_cpm_pcie_init_port - Initialize hardware
463463
* @port: PCIe port information
464464
*/
465-
static void xilinx_cpm_pcie_init_port(struct xilinx_cpm_pcie_port *port)
465+
static void xilinx_cpm_pcie_init_port(struct xilinx_cpm_pcie *port)
466466
{
467467
if (cpm_pcie_link_up(port))
468468
dev_info(port->dev, "PCIe Link is UP\n");
@@ -497,7 +497,7 @@ static void xilinx_cpm_pcie_init_port(struct xilinx_cpm_pcie_port *port)
497497
*
498498
* Return: '0' on success and error value on failure
499499
*/
500-
static int xilinx_cpm_pcie_parse_dt(struct xilinx_cpm_pcie_port *port,
500+
static int xilinx_cpm_pcie_parse_dt(struct xilinx_cpm_pcie *port,
501501
struct resource *bus_range)
502502
{
503503
struct device *dev = port->dev;
@@ -523,7 +523,7 @@ static int xilinx_cpm_pcie_parse_dt(struct xilinx_cpm_pcie_port *port,
523523
return 0;
524524
}
525525

526-
static void xilinx_cpm_free_interrupts(struct xilinx_cpm_pcie_port *port)
526+
static void xilinx_cpm_free_interrupts(struct xilinx_cpm_pcie *port)
527527
{
528528
irq_set_chained_handler_and_data(port->intx_irq, NULL, NULL);
529529
irq_set_chained_handler_and_data(port->irq, NULL, NULL);
@@ -537,7 +537,7 @@ static void xilinx_cpm_free_interrupts(struct xilinx_cpm_pcie_port *port)
537537
*/
538538
static int xilinx_cpm_pcie_probe(struct platform_device *pdev)
539539
{
540-
struct xilinx_cpm_pcie_port *port;
540+
struct xilinx_cpm_pcie *port;
541541
struct device *dev = &pdev->dev;
542542
struct pci_host_bridge *bridge;
543543
struct resource_entry *bus;

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