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Marc Zyngier
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Merge branch irq/loongarch-of into irq/irqchip-next
* irq/loongarch-of: : . : Initial OF support for LoongArch. Funny how it only took : *one* release from plumbing ACPI into an unsuspecting : architecture to start enabling OF on it. Oh well... : . irqchip/loongarch-cpu: Fix a missing prototype warning dt-bindings: interrupt-controller: add yaml for LoongArch CPU interrupt controller irqchip: loongarch-cpu: add DT support Signed-off-by: Marc Zyngier <maz@kernel.org>
2 parents 63ab33c + 065abd1 commit dc7f1c2

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# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
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%YAML 1.2
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---
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$id: http://devicetree.org/schemas/interrupt-controller/loongarch,cpu-interrupt-controller.yaml#
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$schema: http://devicetree.org/meta-schemas/core.yaml#
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title: LoongArch CPU Interrupt Controller
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maintainers:
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- Liu Peibao <liupeibao@loongson.cn>
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properties:
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compatible:
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const: loongarch,cpu-interrupt-controller
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'#interrupt-cells':
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const: 1
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interrupt-controller: true
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additionalProperties: false
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required:
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- compatible
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- '#interrupt-cells'
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- interrupt-controller
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examples:
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- |
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interrupt-controller {
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compatible = "loongarch,cpu-interrupt-controller";
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#interrupt-cells = <1>;
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interrupt-controller;
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};

drivers/irqchip/irq-loongarch-cpu.c

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@@ -92,6 +92,24 @@ static const struct irq_domain_ops loongarch_cpu_intc_irq_domain_ops = {
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.xlate = irq_domain_xlate_onecell,
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};
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#ifdef CONFIG_OF
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static int __init cpuintc_of_init(struct device_node *of_node,
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struct device_node *parent)
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{
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cpuintc_handle = of_node_to_fwnode(of_node);
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irq_domain = irq_domain_create_linear(cpuintc_handle, EXCCODE_INT_NUM,
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&loongarch_cpu_intc_irq_domain_ops, NULL);
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if (!irq_domain)
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panic("Failed to add irqdomain for loongarch CPU");
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set_handle_irq(&handle_cpu_irq);
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return 0;
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}
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IRQCHIP_DECLARE(cpu_intc, "loongson,cpu-interrupt-controller", cpuintc_of_init);
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#endif
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static int __init liointc_parse_madt(union acpi_subtable_headers *header,
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const unsigned long end)
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{

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