Skip to content

Commit dd3c1b3

Browse files
geertuConchuOD
authored andcommitted
riscv: dts: starfive: Group tuples in interrupt properties
To improve human readability and enable automatic validation, the tuples in the various properties containing interrupt specifiers should be grouped. Fix this by grouping the tuples of "interrupts-extended" properties using angle brackets. Signed-off-by: Geert Uytterhoeven <geert@linux-m68k.org> Signed-off-by: Emil Renner Berthing <emil.renner.berthing@canonical.com> Signed-off-by: Conor Dooley <conor.dooley@microchip.com>
1 parent b6b5028 commit dd3c1b3

1 file changed

Lines changed: 4 additions & 4 deletions

File tree

arch/riscv/boot/dts/starfive/jh7100.dtsi

Lines changed: 4 additions & 4 deletions
Original file line numberDiff line numberDiff line change
@@ -149,15 +149,15 @@
149149
clint: clint@2000000 {
150150
compatible = "starfive,jh7100-clint", "sifive,clint0";
151151
reg = <0x0 0x2000000 0x0 0x10000>;
152-
interrupts-extended = <&cpu0_intc 3 &cpu0_intc 7
153-
&cpu1_intc 3 &cpu1_intc 7>;
152+
interrupts-extended = <&cpu0_intc 3>, <&cpu0_intc 7>,
153+
<&cpu1_intc 3>, <&cpu1_intc 7>;
154154
};
155155

156156
plic: interrupt-controller@c000000 {
157157
compatible = "starfive,jh7100-plic", "sifive,plic-1.0.0";
158158
reg = <0x0 0xc000000 0x0 0x4000000>;
159-
interrupts-extended = <&cpu0_intc 11 &cpu0_intc 9
160-
&cpu1_intc 11 &cpu1_intc 9>;
159+
interrupts-extended = <&cpu0_intc 11>, <&cpu0_intc 9>,
160+
<&cpu1_intc 11>, <&cpu1_intc 9>;
161161
interrupt-controller;
162162
#address-cells = <0>;
163163
#interrupt-cells = <1>;

0 commit comments

Comments
 (0)