@@ -38,6 +38,32 @@ static inline struct drm_device *ct_to_drm(struct intel_guc_ct *ct)
3838#define CT_PROBE_ERROR (_ct , _fmt , ...) \
3939 i915_probe_error(ct_to_i915(ct), "CT: " _fmt, ##__VA_ARGS__)
4040
41+ /**
42+ * DOC: CTB Blob
43+ *
44+ * We allocate single blob to hold both CTB descriptors and buffers:
45+ *
46+ * +--------+-----------------------------------------------+------+
47+ * | offset | contents | size |
48+ * +========+===============================================+======+
49+ * | 0x0000 | H2G `CTB Descriptor`_ (send) | |
50+ * +--------+-----------------------------------------------+ 4K |
51+ * | 0x0800 | G2H `CTB Descriptor`_ (recv) | |
52+ * +--------+-----------------------------------------------+------+
53+ * | 0x1000 | H2G `CT Buffer`_ (send) | n*4K |
54+ * | | | |
55+ * +--------+-----------------------------------------------+------+
56+ * | 0x1000 | G2H `CT Buffer`_ (recv) | m*4K |
57+ * | + n*4K | | |
58+ * +--------+-----------------------------------------------+------+
59+ *
60+ * Size of each `CT Buffer`_ must be multiple of 4K.
61+ * As we don't expect too many messages, for now use minimum sizes.
62+ */
63+ #define CTB_DESC_SIZE ALIGN(sizeof(struct guc_ct_buffer_desc), SZ_2K)
64+ #define CTB_H2G_BUFFER_SIZE (SZ_4K)
65+ #define CTB_G2H_BUFFER_SIZE (SZ_4K)
66+
4167struct ct_request {
4268 struct list_head link ;
4369 u32 fence ;
@@ -175,29 +201,7 @@ int intel_guc_ct_init(struct intel_guc_ct *ct)
175201
176202 GEM_BUG_ON (ct -> vma );
177203
178- /* We allocate 1 page to hold both descriptors and both buffers.
179- * ___________.....................
180- * |desc (SEND)| :
181- * |___________| PAGE/4
182- * :___________....................:
183- * |desc (RECV)| :
184- * |___________| PAGE/4
185- * :_______________________________:
186- * |cmds (SEND) |
187- * | PAGE/4
188- * |_______________________________|
189- * |cmds (RECV) |
190- * | PAGE/4
191- * |_______________________________|
192- *
193- * Each message can use a maximum of 32 dwords and we don't expect to
194- * have more than 1 in flight at any time, so we have enough space.
195- * Some logic further ahead will rely on the fact that there is only 1
196- * page and that it is always mapped, so if the size is changed the
197- * other code will need updating as well.
198- */
199-
200- blob_size = PAGE_SIZE ;
204+ blob_size = 2 * CTB_DESC_SIZE + CTB_H2G_BUFFER_SIZE + CTB_G2H_BUFFER_SIZE ;
201205 err = intel_guc_allocate_and_map_vma (guc , blob_size , & ct -> vma , & blob );
202206 if (unlikely (err )) {
203207 CT_PROBE_ERROR (ct , "Failed to allocate %u for CTB data (%pe)\n" ,
@@ -209,17 +213,17 @@ int intel_guc_ct_init(struct intel_guc_ct *ct)
209213
210214 /* store pointers to desc and cmds for send ctb */
211215 desc = blob ;
212- cmds = blob + PAGE_SIZE / 2 ;
213- cmds_size = PAGE_SIZE / 4 ;
216+ cmds = blob + 2 * CTB_DESC_SIZE ;
217+ cmds_size = CTB_H2G_BUFFER_SIZE ;
214218 CT_DEBUG (ct , "%s desc %#tx cmds %#tx size %u\n" , "send" ,
215219 ptrdiff (desc , blob ), ptrdiff (cmds , blob ), cmds_size );
216220
217221 guc_ct_buffer_init (& ct -> ctbs .send , desc , cmds , cmds_size );
218222
219223 /* store pointers to desc and cmds for recv ctb */
220- desc = blob + PAGE_SIZE / 4 ;
221- cmds = blob + PAGE_SIZE / 4 + PAGE_SIZE / 2 ;
222- cmds_size = PAGE_SIZE / 4 ;
224+ desc = blob + CTB_DESC_SIZE ;
225+ cmds = blob + 2 * CTB_DESC_SIZE + CTB_H2G_BUFFER_SIZE ;
226+ cmds_size = CTB_G2H_BUFFER_SIZE ;
223227 CT_DEBUG (ct , "%s desc %#tx cmds %#tx size %u\n" , "recv" ,
224228 ptrdiff (desc , blob ), ptrdiff (cmds , blob ), cmds_size );
225229
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