@@ -1775,8 +1775,7 @@ static void pci_restore_rebar_state(struct pci_dev *pdev)
17751775 return ;
17761776
17771777 pci_read_config_dword (pdev , pos + PCI_REBAR_CTRL , & ctrl );
1778- nbars = (ctrl & PCI_REBAR_CTRL_NBAR_MASK ) >>
1779- PCI_REBAR_CTRL_NBAR_SHIFT ;
1778+ nbars = FIELD_GET (PCI_REBAR_CTRL_NBAR_MASK , ctrl );
17801779
17811780 for (i = 0 ; i < nbars ; i ++ , pos += 8 ) {
17821781 struct resource * res ;
@@ -1787,7 +1786,7 @@ static void pci_restore_rebar_state(struct pci_dev *pdev)
17871786 res = pdev -> resource + bar_idx ;
17881787 size = pci_rebar_bytes_to_size (resource_size (res ));
17891788 ctrl &= ~PCI_REBAR_CTRL_BAR_SIZE ;
1790- ctrl |= size << PCI_REBAR_CTRL_BAR_SHIFT ;
1789+ ctrl |= FIELD_PREP ( PCI_REBAR_CTRL_BAR_SIZE , size ) ;
17911790 pci_write_config_dword (pdev , pos + PCI_REBAR_CTRL , ctrl );
17921791 }
17931792}
@@ -3228,7 +3227,7 @@ void pci_pm_init(struct pci_dev *dev)
32283227 (pmc & PCI_PM_CAP_PME_D2 ) ? " D2" : "" ,
32293228 (pmc & PCI_PM_CAP_PME_D3hot ) ? " D3hot" : "" ,
32303229 (pmc & PCI_PM_CAP_PME_D3cold ) ? " D3cold" : "" );
3231- dev -> pme_support = pmc >> PCI_PM_CAP_PME_SHIFT ;
3230+ dev -> pme_support = FIELD_GET ( PCI_PM_CAP_PME_MASK , pmc ) ;
32323231 dev -> pme_poll = true;
32333232 /*
32343233 * Make device's PM flags reflect the wake-up capability, but
@@ -3299,20 +3298,20 @@ static int pci_ea_read(struct pci_dev *dev, int offset)
32993298 ent_offset += 4 ;
33003299
33013300 /* Entry size field indicates DWORDs after 1st */
3302- ent_size = (( dw0 & PCI_EA_ES ) + 1 ) << 2 ;
3301+ ent_size = (FIELD_GET ( PCI_EA_ES , dw0 ) + 1 ) << 2 ;
33033302
33043303 if (!(dw0 & PCI_EA_ENABLE )) /* Entry not enabled */
33053304 goto out ;
33063305
3307- bei = ( dw0 & PCI_EA_BEI ) >> 4 ;
3308- prop = ( dw0 & PCI_EA_PP ) >> 8 ;
3306+ bei = FIELD_GET ( PCI_EA_BEI , dw0 ) ;
3307+ prop = FIELD_GET ( PCI_EA_PP , dw0 ) ;
33093308
33103309 /*
33113310 * If the Property is in the reserved range, try the Secondary
33123311 * Property instead.
33133312 */
33143313 if (prop > PCI_EA_P_BRIDGE_IO && prop < PCI_EA_P_MEM_RESERVED )
3315- prop = ( dw0 & PCI_EA_SP ) >> 16 ;
3314+ prop = FIELD_GET ( PCI_EA_SP , dw0 ) ;
33163315 if (prop > PCI_EA_P_BRIDGE_IO )
33173316 goto out ;
33183317
@@ -3719,14 +3718,13 @@ static int pci_rebar_find_pos(struct pci_dev *pdev, int bar)
37193718 return - ENOTSUPP ;
37203719
37213720 pci_read_config_dword (pdev , pos + PCI_REBAR_CTRL , & ctrl );
3722- nbars = (ctrl & PCI_REBAR_CTRL_NBAR_MASK ) >>
3723- PCI_REBAR_CTRL_NBAR_SHIFT ;
3721+ nbars = FIELD_GET (PCI_REBAR_CTRL_NBAR_MASK , ctrl );
37243722
37253723 for (i = 0 ; i < nbars ; i ++ , pos += 8 ) {
37263724 int bar_idx ;
37273725
37283726 pci_read_config_dword (pdev , pos + PCI_REBAR_CTRL , & ctrl );
3729- bar_idx = ctrl & PCI_REBAR_CTRL_BAR_IDX ;
3727+ bar_idx = FIELD_GET ( PCI_REBAR_CTRL_BAR_IDX , ctrl ) ;
37303728 if (bar_idx == bar )
37313729 return pos ;
37323730 }
@@ -3781,7 +3779,7 @@ int pci_rebar_get_current_size(struct pci_dev *pdev, int bar)
37813779 return pos ;
37823780
37833781 pci_read_config_dword (pdev , pos + PCI_REBAR_CTRL , & ctrl );
3784- return ( ctrl & PCI_REBAR_CTRL_BAR_SIZE ) >> PCI_REBAR_CTRL_BAR_SHIFT ;
3782+ return FIELD_GET ( PCI_REBAR_CTRL_BAR_SIZE , ctrl ) ;
37853783}
37863784
37873785/**
@@ -3804,7 +3802,7 @@ int pci_rebar_set_size(struct pci_dev *pdev, int bar, int size)
38043802
38053803 pci_read_config_dword (pdev , pos + PCI_REBAR_CTRL , & ctrl );
38063804 ctrl &= ~PCI_REBAR_CTRL_BAR_SIZE ;
3807- ctrl |= size << PCI_REBAR_CTRL_BAR_SHIFT ;
3805+ ctrl |= FIELD_PREP ( PCI_REBAR_CTRL_BAR_SIZE , size ) ;
38083806 pci_write_config_dword (pdev , pos + PCI_REBAR_CTRL , ctrl );
38093807 return 0 ;
38103808}
@@ -6042,7 +6040,7 @@ int pcix_get_max_mmrbc(struct pci_dev *dev)
60426040 if (pci_read_config_dword (dev , cap + PCI_X_STATUS , & stat ))
60436041 return - EINVAL ;
60446042
6045- return 512 << (( stat & PCI_X_STATUS_MAX_READ ) >> 21 );
6043+ return 512 << FIELD_GET ( PCI_X_STATUS_MAX_READ , stat );
60466044}
60476045EXPORT_SYMBOL (pcix_get_max_mmrbc );
60486046
@@ -6065,7 +6063,7 @@ int pcix_get_mmrbc(struct pci_dev *dev)
60656063 if (pci_read_config_word (dev , cap + PCI_X_CMD , & cmd ))
60666064 return - EINVAL ;
60676065
6068- return 512 << (( cmd & PCI_X_CMD_MAX_READ ) >> 2 );
6066+ return 512 << FIELD_GET ( PCI_X_CMD_MAX_READ , cmd );
60696067}
60706068EXPORT_SYMBOL (pcix_get_mmrbc );
60716069
@@ -6096,19 +6094,19 @@ int pcix_set_mmrbc(struct pci_dev *dev, int mmrbc)
60966094 if (pci_read_config_dword (dev , cap + PCI_X_STATUS , & stat ))
60976095 return - EINVAL ;
60986096
6099- if (v > ( stat & PCI_X_STATUS_MAX_READ ) >> 21 )
6097+ if (v > FIELD_GET ( PCI_X_STATUS_MAX_READ , stat ) )
61006098 return - E2BIG ;
61016099
61026100 if (pci_read_config_word (dev , cap + PCI_X_CMD , & cmd ))
61036101 return - EINVAL ;
61046102
6105- o = ( cmd & PCI_X_CMD_MAX_READ ) >> 2 ;
6103+ o = FIELD_GET ( PCI_X_CMD_MAX_READ , cmd ) ;
61066104 if (o != v ) {
61076105 if (v > o && (dev -> bus -> bus_flags & PCI_BUS_FLAGS_NO_MMRBC ))
61086106 return - EIO ;
61096107
61106108 cmd &= ~PCI_X_CMD_MAX_READ ;
6111- cmd |= v << 2 ;
6109+ cmd |= FIELD_PREP ( PCI_X_CMD_MAX_READ , v ) ;
61126110 if (pci_write_config_word (dev , cap + PCI_X_CMD , cmd ))
61136111 return - EIO ;
61146112 }
@@ -6128,7 +6126,7 @@ int pcie_get_readrq(struct pci_dev *dev)
61286126
61296127 pcie_capability_read_word (dev , PCI_EXP_DEVCTL , & ctl );
61306128
6131- return 128 << (( ctl & PCI_EXP_DEVCTL_READRQ ) >> 12 );
6129+ return 128 << FIELD_GET ( PCI_EXP_DEVCTL_READRQ , ctl );
61326130}
61336131EXPORT_SYMBOL (pcie_get_readrq );
61346132
@@ -6161,7 +6159,7 @@ int pcie_set_readrq(struct pci_dev *dev, int rq)
61616159 rq = mps ;
61626160 }
61636161
6164- v = ( ffs (rq ) - 8 ) << 12 ;
6162+ v = FIELD_PREP ( PCI_EXP_DEVCTL_READRQ , ffs (rq ) - 8 );
61656163
61666164 if (bridge -> no_inc_mrrs ) {
61676165 int max_mrrs = pcie_get_readrq (dev );
@@ -6191,7 +6189,7 @@ int pcie_get_mps(struct pci_dev *dev)
61916189
61926190 pcie_capability_read_word (dev , PCI_EXP_DEVCTL , & ctl );
61936191
6194- return 128 << (( ctl & PCI_EXP_DEVCTL_PAYLOAD ) >> 5 );
6192+ return 128 << FIELD_GET ( PCI_EXP_DEVCTL_PAYLOAD , ctl );
61956193}
61966194EXPORT_SYMBOL (pcie_get_mps );
61976195
@@ -6214,7 +6212,7 @@ int pcie_set_mps(struct pci_dev *dev, int mps)
62146212 v = ffs (mps ) - 8 ;
62156213 if (v > dev -> pcie_mpss )
62166214 return - EINVAL ;
6217- v <<= 5 ;
6215+ v = FIELD_PREP ( PCI_EXP_DEVCTL_PAYLOAD , v ) ;
62186216
62196217 ret = pcie_capability_clear_and_set_word (dev , PCI_EXP_DEVCTL ,
62206218 PCI_EXP_DEVCTL_PAYLOAD , v );
@@ -6256,7 +6254,8 @@ u32 pcie_bandwidth_available(struct pci_dev *dev, struct pci_dev **limiting_dev,
62566254 while (dev ) {
62576255 pcie_capability_read_word (dev , PCI_EXP_LNKSTA , & lnksta );
62586256
6259- next_speed = pcie_link_speed [lnksta & PCI_EXP_LNKSTA_CLS ];
6257+ next_speed = pcie_link_speed [FIELD_GET (PCI_EXP_LNKSTA_CLS ,
6258+ lnksta )];
62606259 next_width = FIELD_GET (PCI_EXP_LNKSTA_NLW , lnksta );
62616260
62626261 next_bw = next_width * PCIE_SPEED2MBS_ENC (next_speed );
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