@@ -300,7 +300,6 @@ fdoneloop2:
300300 fdce,m %arg1(%sr1, %arg0) /* Fdce for one loop */
301301
302302fdsync:
303- syncdma
304303 sync
305304 mtsm %r22 /* restore I-bit */
30630589: ALTERNATIVE(88b, 89b, ALT_COND_NO_DCACHE, INSN_NOP)
@@ -488,6 +487,8 @@ ENDPROC_CFI(copy_page_asm)
488487 * parisc chip designers that there will not ever be a parisc
489488 * chip with a larger alias boundary (Never say never :-) ).
490489 *
490+ * Yah, what about the PA8800 and PA8900 processors?
491+ *
491492 * Subtle: the dtlb miss handlers support the temp alias region by
492493 * "knowing" that if a dtlb miss happens within the temp alias
493494 * region it must have occurred while in clear_user_page. Since
@@ -499,19 +500,10 @@ ENDPROC_CFI(copy_page_asm)
499500 * miss on the translation, the dtlb miss handler inserts the
500501 * translation into the tlb using these values:
501502 *
502- * %r26 physical page (shifted for tlb insert) of "to" translation
503- * %r23 physical page (shifted for tlb insert) of "from" translation
503+ * %r26 physical address of "to" translation
504+ * %r23 physical address of "from" translation
504505 */
505506
506- /* Drop prot bits and convert to page addr for iitlbt and idtlbt */
507- #define PAGE_ADD_SHIFT (PAGE_SHIFT-12 )
508- .macro convert_phys_for_tlb_insert20 phys
509- extrd,u \phys, 56 -PAGE_ADD_SHIFT, 32 -PAGE_ADD_SHIFT, \phys
510- #if _PAGE_SIZE_ENCODING_DEFAULT
511- depdi _PAGE_SIZE_ENCODING_DEFAULT, 63 , (63 -58 ), \phys
512- #endif
513- .endm
514-
515507 /*
516508 * copy_user_page_asm() performs a page copy using mappings
517509 * equivalent to the user page mappings. It can be used to
@@ -540,24 +532,10 @@ ENTRY_CFI(copy_user_page_asm)
540532 sub %r25, %r1, %r23
541533
542534 ldil L%(TMPALIAS_MAP_START), %r28
543- #ifdef CONFIG_64BIT
544- #if (TMPALIAS_MAP_START >= 0x80000000 )
545- depdi 0 , 31 ,32 , %r28 /* clear any sign extension */
546- #endif
547- convert_phys_for_tlb_insert20 %r26 /* convert phys addr to tlb insert format */
548- convert_phys_for_tlb_insert20 %r23 /* convert phys addr to tlb insert format */
549- depd %r24,63 ,22 , %r28 /* Form aliased virtual address 'to' */
550- depdi 0 , 63 ,PAGE_SHIFT, %r28 /* Clear any offset bits */
551- copy %r28, %r29
552- depdi 1 , 41 ,1 , %r29 /* Form aliased virtual address 'from' */
553- #else
554- extrw,u %r26, 24 ,25 , %r26 /* convert phys addr to tlb insert format */
555- extrw,u %r23, 24 ,25 , %r23 /* convert phys addr to tlb insert format */
556- depw %r24, 31 ,22 , %r28 /* Form aliased virtual address 'to' */
557- depwi 0 , 31 ,PAGE_SHIFT, %r28 /* Clear any offset bits */
535+ dep_safe %r24, 31 ,TMPALIAS_SIZE_BITS, %r28 /* Form aliased virtual address 'to' */
536+ depi_safe 0 , 31 ,PAGE_SHIFT, %r28 /* Clear any offset bits */
558537 copy %r28, %r29
559- depwi 1 , 9 ,1 , %r29 /* Form aliased virtual address 'from' */
560- #endif
538+ depi_safe 1 , 31 -TMPALIAS_SIZE_BITS,1 , %r29 /* Form aliased virtual address 'from' */
561539
562540 /* Purge any old translations */
563541
@@ -687,18 +665,8 @@ ENTRY_CFI(clear_user_page_asm)
687665 tophys_r1 %r26
688666
689667 ldil L%(TMPALIAS_MAP_START), %r28
690- #ifdef CONFIG_64BIT
691- #if (TMPALIAS_MAP_START >= 0x80000000 )
692- depdi 0 , 31 ,32 , %r28 /* clear any sign extension */
693- #endif
694- convert_phys_for_tlb_insert20 %r26 /* convert phys addr to tlb insert format */
695- depd %r25, 63 ,22 , %r28 /* Form aliased virtual address 'to' */
696- depdi 0 , 63 ,PAGE_SHIFT, %r28 /* Clear any offset bits */
697- #else
698- extrw,u %r26, 24 ,25 , %r26 /* convert phys addr to tlb insert format */
699- depw %r25, 31 ,22 , %r28 /* Form aliased virtual address 'to' */
700- depwi 0 , 31 ,PAGE_SHIFT, %r28 /* Clear any offset bits */
701- #endif
668+ dep_safe %r25, 31 ,TMPALIAS_SIZE_BITS, %r28 /* Form aliased virtual address 'to' */
669+ depi_safe 0 , 31 ,PAGE_SHIFT, %r28 /* Clear any offset bits */
702670
703671 /* Purge any old translation */
704672
@@ -763,18 +731,8 @@ ENDPROC_CFI(clear_user_page_asm)
763731
764732ENTRY_CFI(flush_dcache_page_asm)
765733 ldil L%(TMPALIAS_MAP_START), %r28
766- #ifdef CONFIG_64BIT
767- #if (TMPALIAS_MAP_START >= 0x80000000 )
768- depdi 0 , 31 ,32 , %r28 /* clear any sign extension */
769- #endif
770- convert_phys_for_tlb_insert20 %r26 /* convert phys addr to tlb insert format */
771- depd %r25, 63 ,22 , %r28 /* Form aliased virtual address 'to' */
772- depdi 0 , 63 ,PAGE_SHIFT, %r28 /* Clear any offset bits */
773- #else
774- extrw,u %r26, 24 ,25 , %r26 /* convert phys addr to tlb insert format */
775- depw %r25, 31 ,22 , %r28 /* Form aliased virtual address 'to' */
776- depwi 0 , 31 ,PAGE_SHIFT, %r28 /* Clear any offset bits */
777- #endif
734+ dep_safe %r25, 31 ,TMPALIAS_SIZE_BITS, %r28 /* Form aliased virtual address 'to' */
735+ depi_safe 0 , 31 ,PAGE_SHIFT, %r28 /* Clear any offset bits */
778736
779737 /* Purge any old translation */
780738
@@ -822,18 +780,8 @@ ENDPROC_CFI(flush_dcache_page_asm)
822780
823781ENTRY_CFI(purge_dcache_page_asm)
824782 ldil L%(TMPALIAS_MAP_START), %r28
825- #ifdef CONFIG_64BIT
826- #if (TMPALIAS_MAP_START >= 0x80000000 )
827- depdi 0 , 31 ,32 , %r28 /* clear any sign extension */
828- #endif
829- convert_phys_for_tlb_insert20 %r26 /* convert phys addr to tlb insert format */
830- depd %r25, 63 ,22 , %r28 /* Form aliased virtual address 'to' */
831- depdi 0 , 63 ,PAGE_SHIFT, %r28 /* Clear any offset bits */
832- #else
833- extrw,u %r26, 24 ,25 , %r26 /* convert phys addr to tlb insert format */
834- depw %r25, 31 ,22 , %r28 /* Form aliased virtual address 'to' */
835- depwi 0 , 31 ,PAGE_SHIFT, %r28 /* Clear any offset bits */
836- #endif
783+ dep_safe %r25, 31 ,TMPALIAS_SIZE_BITS, %r28 /* Form aliased virtual address 'to' */
784+ depi_safe 0 , 31 ,PAGE_SHIFT, %r28 /* Clear any offset bits */
837785
838786 /* Purge any old translation */
839787
@@ -881,18 +829,8 @@ ENDPROC_CFI(purge_dcache_page_asm)
881829
882830ENTRY_CFI(flush_icache_page_asm)
883831 ldil L%(TMPALIAS_MAP_START), %r28
884- #ifdef CONFIG_64BIT
885- #if (TMPALIAS_MAP_START >= 0x80000000 )
886- depdi 0 , 31 ,32 , %r28 /* clear any sign extension */
887- #endif
888- convert_phys_for_tlb_insert20 %r26 /* convert phys addr to tlb insert format */
889- depd %r25, 63 ,22 , %r28 /* Form aliased virtual address 'to' */
890- depdi 0 , 63 ,PAGE_SHIFT, %r28 /* Clear any offset bits */
891- #else
892- extrw,u %r26, 24 ,25 , %r26 /* convert phys addr to tlb insert format */
893- depw %r25, 31 ,22 , %r28 /* Form aliased virtual address 'to' */
894- depwi 0 , 31 ,PAGE_SHIFT, %r28 /* Clear any offset bits */
895- #endif
832+ dep_safe %r25, 31 ,TMPALIAS_SIZE_BITS, %r28 /* Form aliased virtual address 'to' */
833+ depi_safe 0 , 31 ,PAGE_SHIFT, %r28 /* Clear any offset bits */
896834
897835 /* Purge any old translation. Note that the FIC instruction
898836 * may use either the instruction or data TLB. Given that we
@@ -1098,7 +1036,6 @@ ENTRY_CFI(flush_kernel_dcache_range_asm)
10981036
10991037 sync
1100103889: ALTERNATIVE(88b, 89b, ALT_COND_NO_DCACHE, INSN_NOP)
1101- syncdma
11021039 bv %r0(%r2)
11031040 nop
11041041ENDPROC_CFI(flush_kernel_dcache_range_asm)
@@ -1140,7 +1077,6 @@ ENTRY_CFI(purge_kernel_dcache_range_asm)
11401077
11411078 sync
1142107989: ALTERNATIVE(88b, 89b, ALT_COND_NO_DCACHE, INSN_NOP)
1143- syncdma
11441080 bv %r0(%r2)
11451081 nop
11461082ENDPROC_CFI(purge_kernel_dcache_range_asm)
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