Commit e26387e
ASoC: renesas: msiof: ignore 1st FSERR
Renesas have tried to minimize the occurrence of FSERR errors as much as
possible, but unfortunately we cannot remove them completely, because
MSIOF might setup its register during CLK/SYNC are inputed. It can be
happen because MSIOF is working as Clock/Frame Consumer.
Ignore 1st FSERR which we can do nothing
Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
Tested-by: Yusuke Goda <yusuke.goda.sx@renesas.com>
Link: https://patch.msgid.link/874isryutg.wl-kuninori.morimoto.gx@renesas.com
Signed-off-by: Mark Brown <broonie@kernel.org>1 parent 8c363f6 commit e26387e
1 file changed
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