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clk: ti: Drop legacy compatibility clocks for am4
We no longer have users for the compatibility clocks and we can drop them. These are old duplicate clocks for what we using. Cc: devicetree@vger.kernel.org Cc: Rob Herring <robh+dt@kernel.org> Signed-off-by: Tony Lindgren <tony@atomide.com> Link: https://lore.kernel.org/r/20220203085618.16043-3-tony@atomide.com Acked-by: Rob Herring <robh@kernel.org> Signed-off-by: Stephen Boyd <sboyd@kernel.org>
1 parent 8850c3e commit e65eb2e

6 files changed

Lines changed: 6 additions & 344 deletions

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‎drivers/clk/ti/Makefile‎

Lines changed: 1 addition & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -18,8 +18,7 @@ obj-$(CONFIG_SOC_OMAP5) += $(clk-common) clk-54xx.o \
1818
obj-$(CONFIG_SOC_DRA7XX) += $(clk-common) clk-7xx.o \
1919
clk-dra7-atl.o dpll3xxx.o \
2020
dpll44xx.o clk-7xx-compat.o
21-
obj-$(CONFIG_SOC_AM43XX) += $(clk-common) dpll3xxx.o clk-43xx.o \
22-
clk-43xx-compat.o
21+
obj-$(CONFIG_SOC_AM43XX) += $(clk-common) dpll3xxx.o clk-43xx.o
2322

2423
endif # CONFIG_ARCH_OMAP2PLUS
2524

‎drivers/clk/ti/clk-43xx-compat.c‎

Lines changed: 0 additions & 225 deletions
This file was deleted.

‎drivers/clk/ti/clk-43xx.c‎

Lines changed: 1 addition & 4 deletions
Original file line numberDiff line numberDiff line change
@@ -282,10 +282,7 @@ int __init am43xx_dt_clk_init(void)
282282
{
283283
struct clk *clk1, *clk2;
284284

285-
if (ti_clk_get_features()->flags & TI_CLK_CLKCTRL_COMPAT)
286-
ti_dt_clocks_register(am43xx_compat_clks);
287-
else
288-
ti_dt_clocks_register(am43xx_clks);
285+
ti_dt_clocks_register(am43xx_clks);
289286

290287
omap2_clk_disable_autoidle_all();
291288

‎drivers/clk/ti/clkctrl.c‎

Lines changed: 4 additions & 12 deletions
Original file line numberDiff line numberDiff line change
@@ -564,19 +564,11 @@ static void __init _ti_omap4_clkctrl_setup(struct device_node *node)
564564
data = am3_clkctrl_data;
565565
#endif
566566
#ifdef CONFIG_SOC_AM43XX
567-
if (of_machine_is_compatible("ti,am4372")) {
568-
if (ti_clk_get_features()->flags & TI_CLK_CLKCTRL_COMPAT)
569-
data = am4_clkctrl_compat_data;
570-
else
571-
data = am4_clkctrl_data;
572-
}
567+
if (of_machine_is_compatible("ti,am4372"))
568+
data = am4_clkctrl_data;
573569

574-
if (of_machine_is_compatible("ti,am438x")) {
575-
if (ti_clk_get_features()->flags & TI_CLK_CLKCTRL_COMPAT)
576-
data = am438x_clkctrl_compat_data;
577-
else
578-
data = am438x_clkctrl_data;
579-
}
570+
if (of_machine_is_compatible("ti,am438x"))
571+
data = am438x_clkctrl_data;
580572
#endif
581573
#ifdef CONFIG_SOC_TI81XX
582574
if (of_machine_is_compatible("ti,dm814"))

‎drivers/clk/ti/clock.h‎

Lines changed: 0 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -201,10 +201,7 @@ extern const struct omap_clkctrl_data am3_clkctrl_data[];
201201
extern const struct omap_clkctrl_data am3_clkctrl_compat_data[];
202202
extern struct ti_dt_clk am33xx_compat_clks[];
203203
extern const struct omap_clkctrl_data am4_clkctrl_data[];
204-
extern const struct omap_clkctrl_data am4_clkctrl_compat_data[];
205-
extern struct ti_dt_clk am43xx_compat_clks[];
206204
extern const struct omap_clkctrl_data am438x_clkctrl_data[];
207-
extern const struct omap_clkctrl_data am438x_clkctrl_compat_data[];
208205
extern const struct omap_clkctrl_data dm814_clkctrl_data[];
209206
extern const struct omap_clkctrl_data dm816_clkctrl_data[];
210207

‎include/dt-bindings/clock/am4.h‎

Lines changed: 0 additions & 98 deletions
Original file line numberDiff line numberDiff line change
@@ -8,104 +8,6 @@
88
#define AM4_CLKCTRL_OFFSET 0x20
99
#define AM4_CLKCTRL_INDEX(offset) ((offset) - AM4_CLKCTRL_OFFSET)
1010

11-
/* XXX: Compatibility part begin, remove this once compatibility support is no longer needed */
12-
13-
/* l4_wkup clocks */
14-
#define AM4_ADC_TSC_CLKCTRL AM4_CLKCTRL_INDEX(0x120)
15-
#define AM4_L4_WKUP_CLKCTRL AM4_CLKCTRL_INDEX(0x220)
16-
#define AM4_WKUP_M3_CLKCTRL AM4_CLKCTRL_INDEX(0x228)
17-
#define AM4_COUNTER_32K_CLKCTRL AM4_CLKCTRL_INDEX(0x230)
18-
#define AM4_TIMER1_CLKCTRL AM4_CLKCTRL_INDEX(0x328)
19-
#define AM4_WD_TIMER2_CLKCTRL AM4_CLKCTRL_INDEX(0x338)
20-
#define AM4_I2C1_CLKCTRL AM4_CLKCTRL_INDEX(0x340)
21-
#define AM4_UART1_CLKCTRL AM4_CLKCTRL_INDEX(0x348)
22-
#define AM4_SMARTREFLEX0_CLKCTRL AM4_CLKCTRL_INDEX(0x350)
23-
#define AM4_SMARTREFLEX1_CLKCTRL AM4_CLKCTRL_INDEX(0x358)
24-
#define AM4_CONTROL_CLKCTRL AM4_CLKCTRL_INDEX(0x360)
25-
#define AM4_GPIO1_CLKCTRL AM4_CLKCTRL_INDEX(0x368)
26-
27-
/* mpu clocks */
28-
#define AM4_MPU_CLKCTRL AM4_CLKCTRL_INDEX(0x20)
29-
30-
/* gfx_l3 clocks */
31-
#define AM4_GFX_CLKCTRL AM4_CLKCTRL_INDEX(0x20)
32-
33-
/* l4_rtc clocks */
34-
#define AM4_RTC_CLKCTRL AM4_CLKCTRL_INDEX(0x20)
35-
36-
/* l4_per clocks */
37-
#define AM4_L3_MAIN_CLKCTRL AM4_CLKCTRL_INDEX(0x20)
38-
#define AM4_AES_CLKCTRL AM4_CLKCTRL_INDEX(0x28)
39-
#define AM4_DES_CLKCTRL AM4_CLKCTRL_INDEX(0x30)
40-
#define AM4_L3_INSTR_CLKCTRL AM4_CLKCTRL_INDEX(0x40)
41-
#define AM4_OCMCRAM_CLKCTRL AM4_CLKCTRL_INDEX(0x50)
42-
#define AM4_SHAM_CLKCTRL AM4_CLKCTRL_INDEX(0x58)
43-
#define AM4_VPFE0_CLKCTRL AM4_CLKCTRL_INDEX(0x68)
44-
#define AM4_VPFE1_CLKCTRL AM4_CLKCTRL_INDEX(0x70)
45-
#define AM4_TPCC_CLKCTRL AM4_CLKCTRL_INDEX(0x78)
46-
#define AM4_TPTC0_CLKCTRL AM4_CLKCTRL_INDEX(0x80)
47-
#define AM4_TPTC1_CLKCTRL AM4_CLKCTRL_INDEX(0x88)
48-
#define AM4_TPTC2_CLKCTRL AM4_CLKCTRL_INDEX(0x90)
49-
#define AM4_L4_HS_CLKCTRL AM4_CLKCTRL_INDEX(0xa0)
50-
#define AM4_GPMC_CLKCTRL AM4_CLKCTRL_INDEX(0x220)
51-
#define AM4_MCASP0_CLKCTRL AM4_CLKCTRL_INDEX(0x238)
52-
#define AM4_MCASP1_CLKCTRL AM4_CLKCTRL_INDEX(0x240)
53-
#define AM4_MMC3_CLKCTRL AM4_CLKCTRL_INDEX(0x248)
54-
#define AM4_QSPI_CLKCTRL AM4_CLKCTRL_INDEX(0x258)
55-
#define AM4_USB_OTG_SS0_CLKCTRL AM4_CLKCTRL_INDEX(0x260)
56-
#define AM4_USB_OTG_SS1_CLKCTRL AM4_CLKCTRL_INDEX(0x268)
57-
#define AM4_PRUSS_CLKCTRL AM4_CLKCTRL_INDEX(0x320)
58-
#define AM4_L4_LS_CLKCTRL AM4_CLKCTRL_INDEX(0x420)
59-
#define AM4_D_CAN0_CLKCTRL AM4_CLKCTRL_INDEX(0x428)
60-
#define AM4_D_CAN1_CLKCTRL AM4_CLKCTRL_INDEX(0x430)
61-
#define AM4_EPWMSS0_CLKCTRL AM4_CLKCTRL_INDEX(0x438)
62-
#define AM4_EPWMSS1_CLKCTRL AM4_CLKCTRL_INDEX(0x440)
63-
#define AM4_EPWMSS2_CLKCTRL AM4_CLKCTRL_INDEX(0x448)
64-
#define AM4_EPWMSS3_CLKCTRL AM4_CLKCTRL_INDEX(0x450)
65-
#define AM4_EPWMSS4_CLKCTRL AM4_CLKCTRL_INDEX(0x458)
66-
#define AM4_EPWMSS5_CLKCTRL AM4_CLKCTRL_INDEX(0x460)
67-
#define AM4_ELM_CLKCTRL AM4_CLKCTRL_INDEX(0x468)
68-
#define AM4_GPIO2_CLKCTRL AM4_CLKCTRL_INDEX(0x478)
69-
#define AM4_GPIO3_CLKCTRL AM4_CLKCTRL_INDEX(0x480)
70-
#define AM4_GPIO4_CLKCTRL AM4_CLKCTRL_INDEX(0x488)
71-
#define AM4_GPIO5_CLKCTRL AM4_CLKCTRL_INDEX(0x490)
72-
#define AM4_GPIO6_CLKCTRL AM4_CLKCTRL_INDEX(0x498)
73-
#define AM4_HDQ1W_CLKCTRL AM4_CLKCTRL_INDEX(0x4a0)
74-
#define AM4_I2C2_CLKCTRL AM4_CLKCTRL_INDEX(0x4a8)
75-
#define AM4_I2C3_CLKCTRL AM4_CLKCTRL_INDEX(0x4b0)
76-
#define AM4_MAILBOX_CLKCTRL AM4_CLKCTRL_INDEX(0x4b8)
77-
#define AM4_MMC1_CLKCTRL AM4_CLKCTRL_INDEX(0x4c0)
78-
#define AM4_MMC2_CLKCTRL AM4_CLKCTRL_INDEX(0x4c8)
79-
#define AM4_RNG_CLKCTRL AM4_CLKCTRL_INDEX(0x4e0)
80-
#define AM4_SPI0_CLKCTRL AM4_CLKCTRL_INDEX(0x500)
81-
#define AM4_SPI1_CLKCTRL AM4_CLKCTRL_INDEX(0x508)
82-
#define AM4_SPI2_CLKCTRL AM4_CLKCTRL_INDEX(0x510)
83-
#define AM4_SPI3_CLKCTRL AM4_CLKCTRL_INDEX(0x518)
84-
#define AM4_SPI4_CLKCTRL AM4_CLKCTRL_INDEX(0x520)
85-
#define AM4_SPINLOCK_CLKCTRL AM4_CLKCTRL_INDEX(0x528)
86-
#define AM4_TIMER2_CLKCTRL AM4_CLKCTRL_INDEX(0x530)
87-
#define AM4_TIMER3_CLKCTRL AM4_CLKCTRL_INDEX(0x538)
88-
#define AM4_TIMER4_CLKCTRL AM4_CLKCTRL_INDEX(0x540)
89-
#define AM4_TIMER5_CLKCTRL AM4_CLKCTRL_INDEX(0x548)
90-
#define AM4_TIMER6_CLKCTRL AM4_CLKCTRL_INDEX(0x550)
91-
#define AM4_TIMER7_CLKCTRL AM4_CLKCTRL_INDEX(0x558)
92-
#define AM4_TIMER8_CLKCTRL AM4_CLKCTRL_INDEX(0x560)
93-
#define AM4_TIMER9_CLKCTRL AM4_CLKCTRL_INDEX(0x568)
94-
#define AM4_TIMER10_CLKCTRL AM4_CLKCTRL_INDEX(0x570)
95-
#define AM4_TIMER11_CLKCTRL AM4_CLKCTRL_INDEX(0x578)
96-
#define AM4_UART2_CLKCTRL AM4_CLKCTRL_INDEX(0x580)
97-
#define AM4_UART3_CLKCTRL AM4_CLKCTRL_INDEX(0x588)
98-
#define AM4_UART4_CLKCTRL AM4_CLKCTRL_INDEX(0x590)
99-
#define AM4_UART5_CLKCTRL AM4_CLKCTRL_INDEX(0x598)
100-
#define AM4_UART6_CLKCTRL AM4_CLKCTRL_INDEX(0x5a0)
101-
#define AM4_OCP2SCP0_CLKCTRL AM4_CLKCTRL_INDEX(0x5b8)
102-
#define AM4_OCP2SCP1_CLKCTRL AM4_CLKCTRL_INDEX(0x5c0)
103-
#define AM4_EMIF_CLKCTRL AM4_CLKCTRL_INDEX(0x720)
104-
#define AM4_DSS_CORE_CLKCTRL AM4_CLKCTRL_INDEX(0xa20)
105-
#define AM4_CPGMAC0_CLKCTRL AM4_CLKCTRL_INDEX(0xb20)
106-
107-
/* XXX: Compatibility part end. */
108-
10911
/* l3s_tsc clocks */
11012
#define AM4_L3S_TSC_CLKCTRL_OFFSET 0x120
11113
#define AM4_L3S_TSC_CLKCTRL_INDEX(offset) ((offset) - AM4_L3S_TSC_CLKCTRL_OFFSET)

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