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kaleshap86
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RDMA/bnxt_re: Add support for QP rate limiting
Broadcom P7 chips supports applying rate limit to RC QPs. It allows adjust shaper rate values during the INIT -> RTR, RTR -> RTS, RTS -> RTS state changes or after QP transitions to RTR or RTS. Signed-off-by: Damodharam Ammepalli <damodharam.ammepalli@broadcom.com> Reviewed-by: Hongguang Gao <hongguang.gao@broadcom.com> Signed-off-by: Kalesh AP <kalesh-anakkur.purayil@broadcom.com> Link: https://patch.msgid.link/20260202133413.3182578-2-kalesh-anakkur.purayil@broadcom.com Signed-off-by: Leon Romanovsky <leon@kernel.org>
1 parent e5b0cfa commit e72d45d

7 files changed

Lines changed: 47 additions & 6 deletions

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‎drivers/infiniband/hw/bnxt_re/ib_verbs.c‎

Lines changed: 11 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -2089,10 +2089,11 @@ int bnxt_re_modify_qp(struct ib_qp *ib_qp, struct ib_qp_attr *qp_attr,
20892089
unsigned int flags;
20902090
u8 nw_type;
20912091

2092-
if (qp_attr_mask & ~IB_QP_ATTR_STANDARD_BITS)
2092+
if (qp_attr_mask & ~(IB_QP_ATTR_STANDARD_BITS | IB_QP_RATE_LIMIT))
20932093
return -EOPNOTSUPP;
20942094

20952095
qp->qplib_qp.modify_flags = 0;
2096+
qp->qplib_qp.ext_modify_flags = 0;
20962097
if (qp_attr_mask & IB_QP_STATE) {
20972098
curr_qp_state = __to_ib_qp_state(qp->qplib_qp.cur_qp_state);
20982099
new_qp_state = qp_attr->qp_state;
@@ -2129,6 +2130,15 @@ int bnxt_re_modify_qp(struct ib_qp *ib_qp, struct ib_qp_attr *qp_attr,
21292130
bnxt_re_unlock_cqs(qp, flags);
21302131
}
21312132
}
2133+
2134+
if (qp_attr_mask & IB_QP_RATE_LIMIT) {
2135+
if (qp->qplib_qp.type != IB_QPT_RC ||
2136+
!_is_modify_qp_rate_limit_supported(dev_attr->dev_cap_flags2))
2137+
return -EOPNOTSUPP;
2138+
qp->qplib_qp.ext_modify_flags |=
2139+
CMDQ_MODIFY_QP_EXT_MODIFY_MASK_RATE_LIMIT_VALID;
2140+
qp->qplib_qp.rate_limit = qp_attr->rate_limit;
2141+
}
21322142
if (qp_attr_mask & IB_QP_EN_SQD_ASYNC_NOTIFY) {
21332143
qp->qplib_qp.modify_flags |=
21342144
CMDQ_MODIFY_QP_MODIFY_MASK_EN_SQD_ASYNC_NOTIFY;

‎drivers/infiniband/hw/bnxt_re/qplib_fp.c‎

Lines changed: 11 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -1313,8 +1313,8 @@ int bnxt_qplib_modify_qp(struct bnxt_qplib_res *res, struct bnxt_qplib_qp *qp)
13131313
struct bnxt_qplib_cmdqmsg msg = {};
13141314
struct cmdq_modify_qp req = {};
13151315
u16 vlan_pcp_vlan_dei_vlan_id;
1316+
u32 bmask, bmask_ext;
13161317
u32 temp32[4];
1317-
u32 bmask;
13181318
int rc;
13191319

13201320
bnxt_qplib_rcfw_cmd_prep((struct cmdq_base *)&req,
@@ -1329,9 +1329,16 @@ int bnxt_qplib_modify_qp(struct bnxt_qplib_res *res, struct bnxt_qplib_qp *qp)
13291329
is_optimized_state_transition(qp))
13301330
bnxt_set_mandatory_attributes(res, qp, &req);
13311331
}
1332+
13321333
bmask = qp->modify_flags;
13331334
req.modify_mask = cpu_to_le32(qp->modify_flags);
1335+
bmask_ext = qp->ext_modify_flags;
1336+
req.ext_modify_mask = cpu_to_le32(qp->ext_modify_flags);
13341337
req.qp_cid = cpu_to_le32(qp->id);
1338+
1339+
if (bmask_ext & CMDQ_MODIFY_QP_EXT_MODIFY_MASK_RATE_LIMIT_VALID)
1340+
req.rate_limit = cpu_to_le32(qp->rate_limit);
1341+
13351342
if (bmask & CMDQ_MODIFY_QP_MODIFY_MASK_STATE) {
13361343
req.network_type_en_sqd_async_notify_new_state =
13371344
(qp->state & CMDQ_MODIFY_QP_NEW_STATE_MASK) |
@@ -1429,6 +1436,9 @@ int bnxt_qplib_modify_qp(struct bnxt_qplib_res *res, struct bnxt_qplib_qp *qp)
14291436
rc = bnxt_qplib_rcfw_send_message(rcfw, &msg);
14301437
if (rc)
14311438
return rc;
1439+
1440+
if (bmask_ext & CMDQ_MODIFY_QP_EXT_MODIFY_MASK_RATE_LIMIT_VALID)
1441+
qp->shaper_allocation_status = resp.shaper_allocation_status;
14321442
qp->cur_qp_state = qp->state;
14331443
return 0;
14341444
}

‎drivers/infiniband/hw/bnxt_re/qplib_fp.h‎

Lines changed: 3 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -280,6 +280,7 @@ struct bnxt_qplib_qp {
280280
u8 state;
281281
u8 cur_qp_state;
282282
u64 modify_flags;
283+
u32 ext_modify_flags;
283284
u32 max_inline_data;
284285
u32 mtu;
285286
u8 path_mtu;
@@ -346,6 +347,8 @@ struct bnxt_qplib_qp {
346347
bool is_host_msn_tbl;
347348
u8 tos_dscp;
348349
u32 ugid_index;
350+
u32 rate_limit;
351+
u8 shaper_allocation_status;
349352
};
350353

351354
#define BNXT_RE_MAX_MSG_SIZE 0x80000000

‎drivers/infiniband/hw/bnxt_re/qplib_res.h‎

Lines changed: 6 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -623,4 +623,10 @@ static inline bool _is_max_srq_ext_supported(u16 dev_cap_ext_flags_2)
623623
return !!(dev_cap_ext_flags_2 & CREQ_QUERY_FUNC_RESP_SB_MAX_SRQ_EXTENDED);
624624
}
625625

626+
static inline bool _is_modify_qp_rate_limit_supported(u16 dev_cap_ext_flags2)
627+
{
628+
return dev_cap_ext_flags2 &
629+
CREQ_QUERY_FUNC_RESP_SB_MODIFY_QP_RATE_LIMIT_SUPPORTED;
630+
}
631+
626632
#endif /* __BNXT_QPLIB_RES_H__ */

‎drivers/infiniband/hw/bnxt_re/qplib_sp.c‎

Lines changed: 5 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -193,6 +193,11 @@ int bnxt_qplib_get_dev_attr(struct bnxt_qplib_rcfw *rcfw)
193193
attr->max_dpi = le32_to_cpu(sb->max_dpi);
194194

195195
attr->is_atomic = bnxt_qplib_is_atomic_cap(rcfw);
196+
197+
if (_is_modify_qp_rate_limit_supported(attr->dev_cap_flags2)) {
198+
attr->rate_limit_min = le16_to_cpu(sb->rate_limit_min);
199+
attr->rate_limit_max = le32_to_cpu(sb->rate_limit_max);
200+
}
196201
bail:
197202
dma_free_coherent(&rcfw->pdev->dev, sbuf.size,
198203
sbuf.sb, sbuf.dma_addr);

‎drivers/infiniband/hw/bnxt_re/qplib_sp.h‎

Lines changed: 2 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -76,6 +76,8 @@ struct bnxt_qplib_dev_attr {
7676
u16 dev_cap_flags;
7777
u16 dev_cap_flags2;
7878
u32 max_dpi;
79+
u16 rate_limit_min;
80+
u32 rate_limit_max;
7981
};
8082

8183
struct bnxt_qplib_pd {

‎drivers/infiniband/hw/bnxt_re/roce_hsi.h‎

Lines changed: 9 additions & 4 deletions
Original file line numberDiff line numberDiff line change
@@ -690,10 +690,11 @@ struct cmdq_modify_qp {
690690
__le32 ext_modify_mask;
691691
#define CMDQ_MODIFY_QP_EXT_MODIFY_MASK_EXT_STATS_CTX 0x1UL
692692
#define CMDQ_MODIFY_QP_EXT_MODIFY_MASK_SCHQ_ID_VALID 0x2UL
693+
#define CMDQ_MODIFY_QP_EXT_MODIFY_MASK_RATE_LIMIT_VALID 0x8UL
693694
__le32 ext_stats_ctx_id;
694695
__le16 schq_id;
695696
__le16 unused_0;
696-
__le32 reserved32;
697+
__le32 rate_limit;
697698
};
698699

699700
/* creq_modify_qp_resp (size:128b/16B) */
@@ -716,7 +717,8 @@ struct creq_modify_qp_resp {
716717
#define CREQ_MODIFY_QP_RESP_PINGPONG_PUSH_INDEX_MASK 0xeUL
717718
#define CREQ_MODIFY_QP_RESP_PINGPONG_PUSH_INDEX_SFT 1
718719
#define CREQ_MODIFY_QP_RESP_PINGPONG_PUSH_STATE 0x10UL
719-
u8 reserved8;
720+
u8 shaper_allocation_status;
721+
#define CREQ_MODIFY_QP_RESP_SHAPER_ALLOCATED 0x1UL
720722
__le32 lag_src_mac;
721723
};
722724

@@ -2179,7 +2181,7 @@ struct creq_query_func_resp {
21792181
u8 reserved48[6];
21802182
};
21812183

2182-
/* creq_query_func_resp_sb (size:1088b/136B) */
2184+
/* creq_query_func_resp_sb (size:1280b/160B) */
21832185
struct creq_query_func_resp_sb {
21842186
u8 opcode;
21852187
#define CREQ_QUERY_FUNC_RESP_SB_OPCODE_QUERY_FUNC 0x83UL
@@ -2256,12 +2258,15 @@ struct creq_query_func_resp_sb {
22562258
#define CREQ_QUERY_FUNC_RESP_SB_REQ_RETRANSMISSION_SUPPORT_LAST \
22572259
CREQ_QUERY_FUNC_RESP_SB_REQ_RETRANSMISSION_SUPPORT_IQM_MSN_TABLE
22582260
#define CREQ_QUERY_FUNC_RESP_SB_MAX_SRQ_EXTENDED 0x40UL
2261+
#define CREQ_QUERY_FUNC_RESP_SB_MODIFY_QP_RATE_LIMIT_SUPPORTED 0x400UL
22592262
#define CREQ_QUERY_FUNC_RESP_SB_MIN_RNR_RTR_RTS_OPT_SUPPORTED 0x1000UL
22602263
__le16 max_xp_qp_size;
22612264
__le16 create_qp_batch_size;
22622265
__le16 destroy_qp_batch_size;
22632266
__le16 max_srq_ext;
2264-
__le64 reserved64;
2267+
__le16 reserved16;
2268+
__le16 rate_limit_min;
2269+
__le32 rate_limit_max;
22652270
};
22662271

22672272
/* cmdq_set_func_resources (size:448b/56B) */

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