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Witold Sadowskibroonie
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spi: cadence: Fix busy cycles calculation
If xSPI is in x2/x4/x8 mode to calculate busy cycles, busy bits count must be divided by the number of lanes. If opcommand is using 8 busy bits, but SPI is in x4 mode, there will be only 2 busy cycles. Signed-off-by: Witold Sadowski <wsadowski@marvell.com> Reviewed-by: Chandrakala Chavva <cchavva@marvell.com> Reviewed-by: Sunil Kovvuri Goutham <sgoutham@marvell.com> Link: https://lore.kernel.org/r/20221219144254.20883-2-wsadowski@marvell.com Signed-off-by: Mark Brown <broonie@kernel.org>
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Lines changed: 4 additions & 1 deletion

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drivers/spi/spi-cadence-xspi.c

Lines changed: 4 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -177,7 +177,10 @@
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#define CDNS_XSPI_CMD_FLD_DSEQ_CMD_3(op) ( \
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FIELD_PREP(CDNS_XSPI_CMD_DSEQ_R3_DCNT_H, \
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((op)->data.nbytes >> 16) & 0xffff) | \
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FIELD_PREP(CDNS_XSPI_CMD_DSEQ_R3_NUM_OF_DUMMY, (op)->dummy.nbytes * 8))
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FIELD_PREP(CDNS_XSPI_CMD_DSEQ_R3_NUM_OF_DUMMY, \
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(op)->dummy.buswidth != 0 ? \
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(((op)->dummy.nbytes * 8) / (op)->dummy.buswidth) : \
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0))
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#define CDNS_XSPI_CMD_FLD_DSEQ_CMD_4(op, chipsel) ( \
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FIELD_PREP(CDNS_XSPI_CMD_DSEQ_R4_BANK, chipsel) | \

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