Skip to content

Commit ea15d0c

Browse files
committed
Merge tag 'qcom-arm64-defconfig-for-6.8-2' of https://git.kernel.org/pub/scm/linux/kernel/git/qcom/linux into soc/defconfig
A few more Qualcomm Arm64 defconfig updates for v6.8 This enables the base drivers necessary to boot devices on the X1E platform. The GPU clock controller for SM8450/SM8550 is enabled and the SC8280XP camera clock controller is enabled, to enable respective functionality on these platforms. * tag 'qcom-arm64-defconfig-for-6.8-2' of https://git.kernel.org/pub/scm/linux/kernel/git/qcom/linux: arm64: defconfig: Enable Qualcomm SC8280XP camera clock controller arm64: defconfig: enable GPU clock controller for SM8[45]50 arm64: defconfig: Enable X1E80100 SoC base configs Link: https://lore.kernel.org/r/20231231034648.3262882-1-andersson@kernel.org Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2 parents ccdc720 + 191fcf7 commit ea15d0c

1 file changed

Lines changed: 6 additions & 0 deletions

File tree

arch/arm64/configs/defconfig

Lines changed: 6 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -622,6 +622,7 @@ CONFIG_PINCTRL_SC8280XP_LPASS_LPI=m
622622
CONFIG_PINCTRL_SM8550=y
623623
CONFIG_PINCTRL_SM8650=y
624624
CONFIG_PINCTRL_SM8550_LPASS_LPI=m
625+
CONFIG_PINCTRL_X1E80100=y
625626
CONFIG_PINCTRL_LPASS_LPI=m
626627
CONFIG_GPIO_AGGREGATOR=m
627628
CONFIG_GPIO_ALTERA=m
@@ -1243,6 +1244,7 @@ CONFIG_COMMON_CLK_MT8192_SCP_ADSP=y
12431244
CONFIG_COMMON_CLK_MT8192_VDECSYS=y
12441245
CONFIG_COMMON_CLK_MT8192_VENCSYS=y
12451246
CONFIG_COMMON_CLK_QCOM=y
1247+
CONFIG_CLK_X1E80100_GCC=y
12461248
CONFIG_QCOM_A53PLL=y
12471249
CONFIG_QCOM_CLK_APCS_MSM8916=y
12481250
CONFIG_QCOM_CLK_APCC_MSM8996=y
@@ -1266,6 +1268,7 @@ CONFIG_QCM_GCC_2290=y
12661268
CONFIG_QCM_DISPCC_2290=m
12671269
CONFIG_QCS_GCC_404=y
12681270
CONFIG_SA_GCC_8775P=y
1271+
CONFIG_SC_CAMCC_8280XP=m
12691272
CONFIG_SC_DISPCC_8280XP=m
12701273
CONFIG_SA_GPUCC_8775P=m
12711274
CONFIG_SC_GCC_7180=y
@@ -1297,6 +1300,8 @@ CONFIG_SM_TCSRCC_8650=y
12971300
CONFIG_SM_GPUCC_6115=m
12981301
CONFIG_SM_GPUCC_8150=y
12991302
CONFIG_SM_GPUCC_8250=y
1303+
CONFIG_SM_GPUCC_8450=m
1304+
CONFIG_SM_GPUCC_8550=m
13001305
CONFIG_SM_GPUCC_8650=m
13011306
CONFIG_SM_VIDEOCC_8250=y
13021307
CONFIG_QCOM_HFPLL=y
@@ -1561,6 +1566,7 @@ CONFIG_INTERCONNECT_QCOM_SM8350=m
15611566
CONFIG_INTERCONNECT_QCOM_SM8450=y
15621567
CONFIG_INTERCONNECT_QCOM_SM8550=y
15631568
CONFIG_INTERCONNECT_QCOM_SM8650=y
1569+
CONFIG_INTERCONNECT_QCOM_X1E80100=y
15641570
CONFIG_COUNTER=m
15651571
CONFIG_RZ_MTU3_CNT=m
15661572
CONFIG_HTE=y

0 commit comments

Comments
 (0)